(9536,6,'2017-04-27 18:40:35','2017-04-27 22:40:35','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire has been selected as the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>Prerequisites</strong>\r\nBasic knowledge of C/C++\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:40:35','2017-04-27 22:40:35','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9537,6,'2017-04-27 18:43:28','2017-04-27 22:43:28','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>Prerequisites</strong>\r\nBasic knowledge of C/C++\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:43:28','2017-04-27 22:43:28','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9538,6,'2017-04-27 18:44:13','2017-04-27 22:44:13','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>Prerequisites</strong>\r\nBasic knowledge of C/C++\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:44:13','2017-04-27 22:44:13','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9539,6,'2017-04-27 18:44:43','2017-04-27 22:44:43','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>Prerequisites</strong>\r\nBasic knowledge of C/C++\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:44:43','2017-04-27 22:44:43','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9540,6,'2017-04-27 18:44:59','2017-04-27 22:44:59','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>Prerequisites</strong>\r\nBasic knowledge of C/C++\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:44:59','2017-04-27 22:44:59','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9541,6,'2017-04-27 18:47:39','2017-04-27 22:47:39','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n&lt;ul&gt;<strong>\r\nPrerequisites</strong>\r\n&lt;li&gt;Basic knowledge of C/C++&lt;/ul&gt;\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:47:39','2017-04-27 22:47:39','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9542,6,'2017-04-27 18:48:12','2017-04-27 22:48:12','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>\r\nPrerequisites\r\n</strong>&lt;ul&gt;\r\n&lt;li&gt;Basic knowledge of C/C++&lt;/ul&gt;\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:48:12','2017-04-27 22:48:12','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9543,6,'2017-04-27 18:48:35','2017-04-27 22:48:35','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>\r\nPrerequisites\r\n</strong>&lt;ul&gt;Basic knowledge of C/C++&lt;/ul&gt;\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:48:35','2017-04-27 22:48:35','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9544,6,'2017-04-27 18:49:08','2017-04-27 22:49:08','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>\r\nPrerequisites\r\n</strong>&lt;ul&gt;&lt;li&gt;Basic knowledge of C/C++&lt;/ul&gt;\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:49:08','2017-04-27 22:49:08','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9545,6,'2017-04-27 18:50:24','2017-04-27 22:50:24','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>\r\nPrerequisites\r\n</strong>&lt;ul&gt;&lt;li&gt;Basic knowledge of C/C++&lt;/li&gt;\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:50:24','2017-04-27 22:50:24','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9546,6,'2017-04-27 18:50:41','2017-04-27 22:50:41','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>\r\nPrerequisites\r\n</strong>&lt;li&gt;Basic knowledge of C/C++&lt;/li&gt;\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:50:41','2017-04-27 22:50:41','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9547,6,'2017-04-27 18:52:31','2017-04-27 22:52:31','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend?</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>\r\nPrerequisites\r\n</strong>&lt;ul&gt;&lt;li&gt;Basic knowledge of C/C++&lt;/li&gt;&lt;/ul&gt;\r\n\r\n<strong>Software Tools</strong>\r\nSDAccel development environment and common build tools\r\n\r\n<strong>Hardware</strong>\r\nArchitecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 18:52:31','2017-04-27 22:52:31','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9548,6,'2017-04-27 19:12:10','2017-04-27 23:12:10','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote. Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment.\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:12:10','2017-04-27 23:12:10','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9549,6,'2017-04-27 19:13:08','2017-04-27 23:13:08','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted)\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:13:08','2017-04-27 23:13:08','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9550,6,'2017-04-27 19:18:50','2017-04-27 23:18:50','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:18:50','2017-04-27 23:18:50','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9551,6,'2017-04-27 19:19:15','2017-04-27 23:19:15','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n<span style=\"color: #ffffff;\">ne can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:19:15','2017-04-27 23:19:15','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9552,6,'2017-04-27 19:19:30','2017-04-27 23:19:30','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n<span style=\"color: #ffffff;\">e can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:19:30','2017-04-27 23:19:30','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9553,6,'2017-04-27 19:20:14','2017-04-27 23:20:14','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n&nbsp;\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]<span style=\"color: #ffffff;\">an\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my </span>[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:20:14','2017-04-27 23:20:14','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9554,6,'2017-04-27 19:20:51','2017-04-27 23:20:51','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]<span style=\"color: #ffffff;\">an\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my </span>[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:20:51','2017-04-27 23:20:51','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9555,6,'2017-04-27 19:21:21','2017-04-27 23:21:21','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]<span style=\"color: #ffffff;\">an\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my </span>[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:21:21','2017-04-27 23:21:21','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9556,6,'2017-04-27 19:21:46','2017-04-27 23:21:46','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my </span>[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:21:46','2017-04-27 23:21:46','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9557,6,'2017-04-27 19:22:33','2017-04-27 23:22:33','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:22:33','2017-04-27 23:22:33','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9558,6,'2017-04-27 19:22:51','2017-04-27 23:22:51','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:22:51','2017-04-27 23:22:51','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9559,6,'2017-04-27 19:23:34','2017-04-27 23:23:34','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely </span>[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:23:34','2017-04-27 23:23:34','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9560,6,'2017-04-27 19:23:54','2017-04-27 23:23:54','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:23:54','2017-04-27 23:23:54','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9561,6,'2017-04-27 19:26:13','2017-04-27 23:26:13','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:26:13','2017-04-27 23:26:13','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9562,6,'2017-04-27 19:27:36','2017-04-27 23:27:36','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline] Lectures:\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:27:36','2017-04-27 23:27:36','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9563,6,'2017-04-27 19:28:14','2017-04-27 23:28:14','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:28:14','2017-04-27 23:28:14','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9564,6,'2017-04-27 19:30:26','2017-04-27 23:30:26','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:30:26','2017-04-27 23:30:26','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9565,6,'2017-04-27 19:35:00','2017-04-27 23:35:00','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Multi-GPU[/custom_headline] Lectures (customizable):\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:35:00','2017-04-27 23:35:00','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9566,6,'2017-04-27 19:35:26','2017-04-27 23:35:26','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline] Lectures (customizable):\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:35:26','2017-04-27 23:35:26','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9567,6,'2017-04-27 19:35:55','2017-04-27 23:35:55','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, M[/custom_headline] Lectures (customizable):\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:35:55','2017-04-27 23:35:55','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9568,6,'2017-04-27 19:36:10','2017-04-27 23:36:10','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Multi-GPU[/custom_headline] Lectures (customizable):\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li>Using</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:36:10','2017-04-27 23:36:10','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9569,6,'2017-04-27 19:36:40','2017-04-27 23:36:40','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:36:40','2017-04-27 23:36:40','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9570,6,'2017-04-27 19:38:11','2017-04-27 23:38:11','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:38:11','2017-04-27 23:38:11','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9571,6,'2017-04-27 19:38:50','2017-04-27 23:38:50','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3[/custom_headline]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:38:50','2017-04-27 23:38:50','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9572,6,'2017-04-27 19:39:17','2017-04-27 23:39:17','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:39:17','2017-04-27 23:39:17','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9573,6,'2017-04-27 19:41:14','2017-04-27 23:41:14','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n</ul>\r\n<strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:41:14','2017-04-27 23:41:14','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9574,6,'2017-04-27 19:41:59','2017-04-27 23:41:59','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:41:59','2017-04-27 23:41:59','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9575,6,'2017-04-27 19:42:46','2017-04-27 23:42:46','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline] Lectures (customizable):\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n</ul>\r\n<strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:42:46','2017-04-27 23:42:46','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9576,6,'2017-04-27 19:43:15','2017-04-27 23:43:15','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline] Lectures (customizable):\r\n\r\n&nbsp;\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n</ul>\r\n<strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:43:15','2017-04-27 23:43:15','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9577,6,'2017-04-27 19:44:01','2017-04-27 23:44:01','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline] Lectures (customizable):\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:44:01','2017-04-27 23:44:01','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9578,6,'2017-04-27 19:45:41','2017-04-27 23:45:41','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:45:41','2017-04-27 23:45:41','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9579,6,'2017-04-27 19:46:19','2017-04-27 23:46:19','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:46:19','2017-04-27 23:46:19','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9580,6,'2017-04-27 19:47:14','2017-04-27 23:47:14','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:47:14','2017-04-27 23:47:14','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9581,6,'2017-04-27 19:47:49','2017-04-27 23:47:49','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted.\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now register</em>[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:47:49','2017-04-27 23:47:49','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9582,6,'2017-04-27 19:48:55','2017-04-27 23:48:55','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel™ development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price</strong> – Contact ArrayFire for quote (Xilinx training credits accepted)\r\n\r\n<strong>Who Should Attend? –</strong> Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites – </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools – </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware – </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now register</em>[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-27 19:48:55','2017-04-27 23:48:55','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9583,6,'2017-06-07 16:23:32','2017-06-07 20:23:32','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\n\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Train your team[/custom_headline] Attendees will receive the latest industry knowledge and techniques for GPU computing in CUDA and OpenCL.\n\nArrayFire offers up to four days of specialized GPU training in CUDA and OpenCL programming. We provide customized on-site training courses for customers with 5 or more attendees from their organization. We can travel to your location and provide a CUDA or OpenCL training course tailored to meet your application-specific needs. We also offer individual trainings at our Atlanta office.\n\nWe recommend that attendees have a working knowledge of C/C++ in order to gain the most from the training courses.\n\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us about a training[/button]\n\n[/column]\n\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\n\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\n\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\n\n[/column][column type=\"one-half\" last=\"true\"]\n\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\n\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\n\n[icon_list] [icon_list_item type=\"angle-double-right\"]Instruction by an excellent and interesting expert[/icon_list_item] [icon_list_item type=\"angle-double-right\"]Hands-on exercises[/icon_list_item][icon_list_item type=\"angle-double-right\"]Use of a laptop with CUDA and OpenCL capable GPUs and CPUs [/icon_list_item] [icon_list_item type=\"angle-double-right\"]Choice of Linux or Windows operating system[/icon_list_item][icon_list_item type=\"angle-double-right\"]Printed manual of lecture material[/icon_list_item][icon_list_item type=\"angle-double-right\"]Electronic copy of programming exercises[/icon_list_item][/icon_list]\n\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Go ahead, contact us about a training[/button]\n\n[/column][/content_band]\n\n[content_band bg_image=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/11/Epipheo-background1.png\" parallax=\"true\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\n\n[blockquote cite=\"<span style=\"color: #ffffff;\">Brian Rapp</span>\" type=\"center\"]<span style=\"color: #ffffff;\">One can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\n\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\n\n[/content_band]\n\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\n\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\nGPU Computing Overview\nThe Programming Model\nBasic Dataset Mapping Techniques\nLibraries, ArrayFire\nProfiling Tools\n\nPractice:\nA Simple Kernel\nEquivalent ArrayFire Example\nUsing Libraries\nMonte Carlo Pi Estimation\nTiming and ArrayFire\nDebugging Code\n\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\nMulti-GPU Use Cases\nMulti-GPUs: Contexts\nExisting Libraries\nScaling Across Multiple GPUs\n\nPractice:\nOut of Core Problems: Matrix Multiply\nTask Level Parallelism: Optimization\nArrayFire Multi-GPU[/column]\n\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\nArchitecture: Grids, Blocks, and Threads\nMemory Model: Global, Shared, and Constant Memory\nAdvanced Mapping Techniques\nStreams: Asynchronos Launches and Concurrent Execution\nArrayFire: Lazy Evaluation and Code Vectorization\n\nPractice:\nMatrix Transpose\nOptimization Using Shared Memory\nMedian Filter\nOptimization Using Constant Memory\nStream Example\nArrayFire Example: Nearest Neighbor Algorithm\n\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\n\nLectures and Practice (customizable):\nReductions\nScan Algorithms\nSort\nConvolution\nCustomer-Specific Problem\n\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Training','','inherit','closed','closed','','6640-autosave-v1','','','2017-06-07 16:23:32','2017-06-07 20:23:32','',6640,'https://sandbox.arrayfire.com/6640-autosave-v1/',0,'revision','',0),(9584,6,'2017-04-27 20:02:04','2017-04-28 00:02:04','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]CUDA &amp; OpenCL Training[/custom_headline]\r\n\r\nArrayFire offers up to four days of specialized GPU training in CUDA and OpenCL programming. We provide customized on-site training courses. We can travel to your location and provide a CUDA or OpenCL training course tailored to meet your application-specific needs. We also offer trainings at our Atlanta office.\r\n\r\nWe recommend that attendees have a working knowledge of C/C++ in order to gain the most from the training courses.\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us about a training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n[icon_list] [icon_list_item type=\"angle-double-right\"]Instruction by an excellent and interesting expert[/icon_list_item] [icon_list_item type=\"angle-double-right\"]Hands-on exercises[/icon_list_item][icon_list_item type=\"angle-double-right\"]Use of a laptop with CUDA and OpenCL capable GPUs and CPUs [/icon_list_item] [icon_list_item type=\"angle-double-right\"]Choice of Linux or Windows operating system[/icon_list_item][icon_list_item type=\"angle-double-right\"]Printed manual of lecture material[/icon_list_item][icon_list_item type=\"angle-double-right\"]Electronic copy of programming exercises[/icon_list_item][/icon_list]\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Go ahead, contact us about a training[/button]\r\n\r\n[/column][/content_band]\r\n\r\n[content_band bg_image=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/11/Epipheo-background1.png\" parallax=\"true\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[blockquote cite=\"<span style=\"color: #ffffff;\">Brian Rapp</span>\" type=\"center\"]<span style=\"color: #ffffff;\">One can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','CUDA/OpenCL Training','','inherit','closed','closed','','9492-revision-v1','','','2017-04-27 20:02:04','2017-04-28 00:02:04','',9492,'https://sandbox.arrayfire.com/9492-revision-v1/',0,'revision','',0),(9585,6,'2017-04-27 20:02:43','2017-04-28 00:02:43','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]CUDA &amp; OpenCL Training[/custom_headline]\r\n\r\nArrayFire offers up to four days of specialized GPU training in CUDA and OpenCL programming. Attendees will receive the latest industry knowledge and techniques for GPU computing in CUDA and OpenCL.\r\n\r\nWe provide customized on-site training courses. We can travel to your location and provide a CUDA or OpenCL training course tailored to meet your application-specific needs. We also offer trainings at our Atlanta office.\r\n\r\nWe recommend that attendees have a working knowledge of C/C++ in order to gain the most from the training courses.\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us about a training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n[icon_list] [icon_list_item type=\"angle-double-right\"]Instruction by an excellent and interesting expert[/icon_list_item] [icon_list_item type=\"angle-double-right\"]Hands-on exercises[/icon_list_item][icon_list_item type=\"angle-double-right\"]Use of a laptop with CUDA and OpenCL capable GPUs and CPUs [/icon_list_item] [icon_list_item type=\"angle-double-right\"]Choice of Linux or Windows operating system[/icon_list_item][icon_list_item type=\"angle-double-right\"]Printed manual of lecture material[/icon_list_item][icon_list_item type=\"angle-double-right\"]Electronic copy of programming exercises[/icon_list_item][/icon_list]\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Go ahead, contact us about a training[/button]\r\n\r\n[/column][/content_band]\r\n\r\n[content_band bg_image=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/11/Epipheo-background1.png\" parallax=\"true\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[blockquote cite=\"<span style=\"color: #ffffff;\">Brian Rapp</span>\" type=\"center\"]<span style=\"color: #ffffff;\">One can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','CUDA/OpenCL Training','','inherit','closed','closed','','9492-revision-v1','','','2017-04-27 20:02:43','2017-04-28 00:02:43','',9492,'https://sandbox.arrayfire.com/9492-revision-v1/',0,'revision','',0),(9588,6,'2017-04-27 20:10:08','2017-04-28 00:10:08',' ','','','publish','closed','closed','','9588','','','2018-08-22 21:35:30','2018-08-23 01:35:30','',0,'https://sandbox.arrayfire.com/9588/',12,'nav_menu_item','',0),(9589,6,'2017-04-27 20:10:08','2017-04-28 00:10:08',' ','','','publish','closed','closed','','9589','','','2018-08-22 21:35:30','2018-08-23 01:35:30','',0,'https://sandbox.arrayfire.com/9589/',13,'nav_menu_item','',0),(9591,6,'2017-04-28 13:47:00','2017-04-28 17:47:00','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\n\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\n\nArrayFire is the exclusive Xilinx SDAccel™ Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\n\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\n\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\n\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\n\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\n\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\n\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\n\n<strong>Course Duration</strong> – 2 days\n\n<strong>Price and Scheduling</strong> – Contact ArrayFire for quote and scheduling (Xilinx training credits accepted)\n\n<strong>Who Should Attend? </strong>– Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\n\n<strong>Prerequisites </strong>–<strong> </strong>Basic knowledge of C/C++\n\n<strong>Software Tools </strong>–<strong> </strong>SDAccel development environment and common build tools\n\n<strong>Hardware </strong>–<strong> </strong>Architecture: 7 series, UltraScale, UltraScale+\n\n&nbsp;\n\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\n\n[/column]\n\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\n\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\n<ul>\n 	<li>Introduction to OpenCL</li>\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\n 	<li>OpenCL Support for Xilinx FPGAs</li>\n 	<li>FPGA Hardware Details</li>\n 	<li>Introduction to the OpenCL API</li>\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\n 	<li>OpenCL Execution Model</li>\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\n 	<li>Memory Hierarchy</li>\n 	<li>Profiling and Debugging</li>\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\n 	<li>Optimization</li>\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\n</ul>\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\n<ul>\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\n 	<li>RTL IP as Kernels in OpenCL</li>\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\n</ul>\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\n<ul>\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\n</ul>\n&nbsp;\n\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now register</em>[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-autosave-v1','','','2017-04-28 13:47:00','2017-04-28 17:47:00','',9494,'https://sandbox.arrayfire.com/9494-autosave-v1/',0,'revision','',0),(9592,6,'2017-04-28 13:41:02','2017-04-28 17:41:02','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel™ Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price and Scheduling</strong> – Contact ArrayFire for quote and scheduling (Xilinx training credits accepted)\r\n\r\n<strong>Who Should Attend? </strong>– Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites </strong>–<strong> </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools </strong>–<strong> </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware </strong>–<strong> </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now register</em>[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-28 13:41:02','2017-04-28 17:41:02','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9593,6,'2017-04-28 13:45:47','2017-04-28 17:45:47','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive SDAccel™ Xilinx Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price and Scheduling</strong> – Contact ArrayFire for quote and scheduling (Xilinx training credits accepted)\r\n\r\n<strong>Who Should Attend? </strong>– Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites </strong>–<strong> </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools </strong>–<strong> </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware </strong>–<strong> </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now register</em>[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-28 13:45:47','2017-04-28 17:45:47','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9594,6,'2017-04-28 13:48:09','2017-04-28 17:48:09','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Xilinx SDAccel Training[/custom_headline]\r\n\r\nArrayFire is the exclusive Xilinx SDAccel™ Authorized Training Partner (ATP) for North America. Our SDAccel training courses help enable design teams to leverage Xilinx FPGAs for OpenCL application acceleration.\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2015/05/xilinx_alliance-1024x332.png\" alt=\"xilinx_alliance\" />[custom_headline type=\"left\" level=\"h5\"]Course Name[/custom_headline]Developing and Optimizing Applications Using the OpenCL Framework for FPGAs\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[custom_headline type=\"left\" level=\"h5\"]Course Description[/custom_headline]\r\n\r\nLearn how to develop new applications written in OpenCL, C/C++, and RTL in the SDAccel development environment for use on Xilinx FPGAs. Porting existing applications is also covered.\r\n\r\nTraining lectures and labs for this course will enable attendees to gain necessary skills to: identify parallel computing applications suitable for accelerating on FPGAs, understand how the FPGA architecture lends itself to parallel computing, write OpenCL programs for FPGAs, and utilize the SDAccel Development Environment.\r\n\r\nThis course also demonstrates how to debug and profile OpenCL code using the SDAccel development environment. In addition, you will also learn how to maximize performance and efficiently utilize FPGA resources.\r\n\r\n<strong>Course Duration</strong> – 2 days\r\n\r\n<strong>Price and Scheduling</strong> – Contact ArrayFire for quote and scheduling (Xilinx training credits accepted)\r\n\r\n<strong>Who Should Attend? </strong>– Software and hardware developers who want to develop OpenCL, C/C++, and RTL applications in the SDAccel development environment\r\n\r\n<strong>Prerequisites </strong>–<strong> </strong>Basic knowledge of C/C++\r\n\r\n<strong>Software Tools </strong>–<strong> </strong>SDAccel development environment and common build tools\r\n\r\n<strong>Hardware </strong>–<strong> </strong>Architecture: 7 series, UltraScale, UltraScale+\r\n\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us to register for training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]<span style=\"color: #ffffff;\">n\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on </span>[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Course Outline[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1[/custom_headline]\r\n<ul>\r\n 	<li>Introduction to OpenCL</li>\r\n 	<li>Comparison of CPU, GPU, and FPGA Architectures</li>\r\n 	<li>OpenCL Support for Xilinx FPGAs</li>\r\n 	<li>FPGA Hardware Details</li>\r\n 	<li>Introduction to the OpenCL API</li>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch</li>\r\n 	<li>OpenCL Execution Model</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition</li>\r\n 	<li>Memory Hierarchy</li>\r\n 	<li>Profiling and Debugging</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes</li>\r\n 	<li>Optimization</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels</li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2[/custom_headline]\r\n<ul>\r\n 	<li>Using the SDAccel Development Environment: Coding, Compiling, Emulating, Profiling, and Debugging</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI</li>\r\n 	<li>Using Existing C/C++ Code as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL</li>\r\n 	<li>RTL IP as Kernels in OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel</li>\r\n</ul>\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Lab Descriptions[/custom_headline]\r\n<ul>\r\n 	<li><strong>Lab 1: </strong>Creating an OpenCL Program from Scratch – Provides an overview of OpenCL API, memory transfers, and kernel enqueuer operations.</li>\r\n 	<li><strong>Lab 2: </strong>Vector Addition – Learn how to execute parallel kernels.</li>\r\n 	<li><strong>Lab 3</strong>: Pi by Monte Carlo Processes – Implement the Pi by Monte Carlo processes.</li>\r\n 	<li><strong>Lab 4</strong>: Maximizing Performance – Use vector data types and increase bandwidth.</li>\r\n 	<li><strong>Lab 5</strong>: Optimizing Kernels – Use Loop Unrolling and Loop Pipelining.</li>\r\n 	<li><strong>Lab 6</strong>: Profiling and Debugging Using the SDAccel Development Environment GUI – Learn how to use interactive programming tools to improve performance and squash bugs.</li>\r\n 	<li><strong>Lab 7</strong>: Optimizing C/C++ Code for OpenCL – Convert existing C/C++ code into a kernel that can be used by OpenCL</li>\r\n 	<li><strong>Lab 8</strong>: Using an RTL Kernel – Learn how to use existing, highly optimized IP in a new OpenCL application.</li>\r\n</ul>\r\n&nbsp;\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now register</em>[/button][/column][/content_band]','Xilinx SDAccel Training','','inherit','closed','closed','','9494-revision-v1','','','2017-04-28 13:48:09','2017-04-28 17:48:09','',9494,'https://sandbox.arrayfire.com/9494-revision-v1/',0,'revision','',0),(9596,6,'2017-05-05 16:44:48','2017-05-05 20:44:48','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/NvidiaGPU.jpg\"><img class=\"alignnone size-full wp-image-9609\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/NvidiaGPU.jpg\" alt=\"NvidiaGPU\" width=\"722\" height=\"406\" /></a>\r\n<h5>GTC is quickly approaching and we want to see you there!</h5>\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n<h5><strong>Attend an ArrayFire Talk</strong></h5>\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n\r\n<strong>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</strong>\r\n\r\n<strong>Presented by Kumar Aatish - Thursday May 11 at 9:00 am - Marriott Ballroom 3\r\n(Session ID S7723)</strong>\r\n\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/10/IMG_0737-300x225.jpg\" alt=\"IMG_0737\" />\r\n<h5>Schedule a Meeting With Us</h5>\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','publish','open','closed','','visit-arrayfire-at-gtc-2017','','','2017-05-08 11:06:06','2017-05-08 15:06:06','',0,'https://sandbox.arrayfire.com/?p=9596',0,'post','',0),(9597,6,'2017-05-05 17:35:30','0000-00-00 00:00:00','<span style=\"font-weight: 400;\">Today we are pleased to announce the release of ArrayFire v3.5, our open source library of parallel computing functions supporting CUDA, OpenCL, and CPU devices. This new version of ArrayFire improves features and performance for applications in machine learning, computer vision, signal processing, statistics, finance, and more.</span>\r\n\r\nThis release focuses on thread-safety, support for simple sparse-dense arithmetic operations, canny edge detector function, and a genetic algorithm example. A complete list of ArrayFire v3.5 updates and new features can be found in the product <a href=\"http://arrayfire.org/docs/releasenotes.htm\">Release Notes</a>.\r\n\r\n[custom_headline type=\"left\" level=\"h3\" looks_like=\"h3\"]Major Updates and Features[/custom_headline]\r\n<ul>\r\n 	<li>Sparse Matrix and BLAS (<a href=\"http://sandbox.arrayfire.com/sparse-matrices-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Support for CSR and COO storage types</li>\r\n 	<li>Sparse-Dense Matrix Multiplication and Matrix-Vector Multiplication</li>\r\n 	<li>Conversion to and from dense matrix to CSR and COO storage types</li>\r\n</ul>\r\n</li>\r\n 	<li>Support for Random Number Generator Engines (<a href=\"http://sandbox.arrayfire.com/random-number-generators-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Philox</li>\r\n 	<li>Threefry</li>\r\n 	<li>Mersenne Twister</li>\r\n</ul>\r\n</li>\r\n 	<li>Image Processing (<a href=\"http://sandbox.arrayfire.com/image-processing-functions-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>New interpolation functions</li>\r\n 	<li>Image moments</li>\r\n</ul>\r\n</li>\r\n 	<li>Faster JIT for CUDA and OpenCL (<a href=\"http://sandbox.arrayfire.com/performance-improvements-to-jit-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Performance improvements</li>\r\n 	<li>Support for evaluating multiple outputs in a single kernel</li>\r\n</ul>\r\n</li>\r\n 	<li>Improvements to Graphics (<a href=\"http://sandbox.arrayfire.com/graphics-updates-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Using Forge v0.9.0</li>\r\n 	<li>Vector Field plotting functionality</li>\r\n 	<li>Multiple overlays on the same window are now possible</li>\r\n 	<li>New API to set axes limits for graphs</li>\r\n 	<li>New API for plot and scatter</li>\r\n</ul>\r\n</li>\r\n</ul>\r\nFor the comprehensive list of new features and updates, please refer to our <a href=\"http://arrayfire.org/docs/releasenotes.htm\">release notes</a>.\r\n\r\n<span style=\"font-weight: 400;\">While we are happy for reaching this milestone, we are not complacent. Work on the next milestone has already commenced, and we hope to exceed the expectations of our community.</span>\r\n\r\n[custom_headline type=\"left\" level=\"h3\" looks_like=\"h3\"]Download[/custom_headline]\r\n\r\nArrayFire v3.5 can be downloaded from these locations:\r\n<ul>\r\n 	<li><a href=\"http://sandbox.arrayfire.com/download/\">Binaries</a></li>\r\n 	<li><a href=\"https://github.com/arrayfire\">Source code</a></li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h3\" looks_like=\"h3\"]Community[/custom_headline]\r\n\r\nArrayFire is continually improving through the addition of new functions and features. We welcome your feedback:\r\n<ul>\r\n 	<li>General discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\">ArrayFire Google Group</a></li>\r\n 	<li>Live discussion chat on the <a href=\"https://gitter.im/arrayfire/arrayfire?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\">ArrayFire Gitter</a></li>\r\n 	<li>Issue reports on the <a href=\"https://github.com/arrayfire/arrayfire/issues\">ArrayFire GitHub</a></li>\r\n</ul>\r\nFinally, as you find success with ArrayFire, we invite you to contribute a post to this blog to share with the broader community. Email <a href=\"mailto:scott@arrayfire.com\">sales@arrayfire.com</a> to contribute to this blog.\r\n\r\n&nbsp;','ArrayFire v3.5 Official Release','','draft','open','closed','','arrayfire-v3-4-official-release','','','2017-05-05 17:35:30','2017-05-05 21:35:30','',0,'https://sandbox.arrayfire.com/?p=9597',0,'post','',0),(9598,6,'2017-05-05 16:25:53','2017-05-05 20:25:53','','GTC17','','inherit','open','closed','','gtc17','','','2017-05-05 16:25:53','2017-05-05 20:25:53','',9596,'https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17.jpg',0,'attachment','image/jpeg',0),(9599,6,'2017-05-05 16:39:18','2017-05-05 20:39:18','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17.jpg\"><img class=\"alignnone size-medium wp-image-9598\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17-300x168.jpg\" alt=\"GTC17\" width=\"300\" height=\"168\" /></a>\r\n\r\nGTC is quickly approaching and we want to see you there!\r\n\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n<h5>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</h5>\r\n<h6>Presented by Kumar Aatish - Thursday May 11 at 9:00 am in Marriott Ballroom 3 (Session ID S7723)</h6>\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n<h5>Schedule a Meeting with Us</h5>\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 16:39:18','2017-05-05 20:39:18','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0),(9600,6,'2017-05-05 16:44:13','2017-05-05 20:44:13','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17.jpg\"><img class=\"alignnone size-medium wp-image-9598\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17-300x168.jpg\" alt=\"GTC17\" width=\"300\" height=\"168\" /></a>\r\n\r\nGTC is quickly approaching and we want to see you there!\r\n\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n<h5>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</h5>\r\n<h6>Presented by Kumar Aatish - Thursday May 11 9:00 am - Marriott Ballroom 3 (Session ID S7723)</h6>\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\nSchedule a Meeting with Us\r\n\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 16:44:13','2017-05-05 20:44:13','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0),(9601,6,'2017-05-05 16:44:48','2017-05-05 20:44:48','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17.jpg\"><img class=\"alignnone size-medium wp-image-9598\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17-300x168.jpg\" alt=\"GTC17\" width=\"300\" height=\"168\" /></a>\r\n\r\nGTC is quickly approaching and we want to see you there!\r\n\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n\r\nARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS\r\n<h6>Presented by Kumar Aatish - Thursday May 11 9:00 am - Marriott Ballroom 3 (Session ID S7723)</h6>\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\nSchedule a Meeting with Us\r\n\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 16:44:48','2017-05-05 20:44:48','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0),(9602,6,'2017-05-05 17:24:32','2017-05-05 21:24:32','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/NvidiaGPU.jpg\"><img class=\"alignnone size-full wp-image-9609\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/NvidiaGPU.jpg\" alt=\"NvidiaGPU\" width=\"722\" height=\"406\" /></a>\n<h5>GTC is quickly approaching and we want to see you there!</h5>\n<strong>When: May 8-11</strong>\n<strong>Where: San Jose, California</strong>\n<strong>ArrayFire Booth: 406</strong>\n\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\n<h5><strong>Attend an ArrayFire Talk</strong></h5>\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\n\n<strong>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</strong>\n\n<strong>Presented by Kumar Aatish - Thursday May 11 9:00 am - Marriott Ballroom 3\n(Session ID S7723)</strong>\n\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\n\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\n\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/10/IMG_0737-300x225.jpg\" alt=\"IMG_0737\" />\n<h5>Schedule a Meeting With Us</h5>\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\n\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-autosave-v1','','','2017-05-05 17:24:32','2017-05-05 21:24:32','',9596,'https://sandbox.arrayfire.com/9596-autosave-v1/',0,'revision','',0),(9603,6,'2017-05-05 16:45:27','2017-05-05 20:45:27','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17.jpg\"><img class=\"alignnone size-medium wp-image-9598\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17-300x168.jpg\" alt=\"GTC17\" width=\"300\" height=\"168\" /></a>\r\n\r\nGTC is quickly approaching and we want to see you there!\r\n\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n\r\n<strong>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</strong>\r\n<h6>Presented by Kumar Aatish - Thursday May 11 9:00 am - Marriott Ballroom 3 (Session ID S7723)</h6>\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\nSchedule a Meeting with Us\r\n\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 16:45:27','2017-05-05 20:45:27','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0),(9604,6,'2017-05-05 16:46:47','2017-05-05 20:46:47','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17.jpg\"><img class=\"alignnone size-medium wp-image-9598\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17-300x168.jpg\" alt=\"GTC17\" width=\"300\" height=\"168\" /></a>\r\n\r\nGTC is quickly approaching and we want to see you there!\r\n\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n<h2><strong>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</strong></h2>\r\n<h6>Presented by Kumar Aatish - Thursday May 11 9:00 am - Marriott Ballroom 3 (Session ID S7723)</h6>\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\nSchedule a Meeting with Us\r\n\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 16:46:47','2017-05-05 20:46:47','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0),(9605,6,'2017-05-05 16:47:15','2017-05-05 20:47:15','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17.jpg\"><img class=\"alignnone size-medium wp-image-9598\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17-300x168.jpg\" alt=\"GTC17\" width=\"300\" height=\"168\" /></a>\r\n\r\nGTC is quickly approaching and we want to see you there!\r\n\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n<h3><strong>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</strong></h3>\r\n<h6>Presented by Kumar Aatish - Thursday May 11 9:00 am - Marriott Ballroom 3 (Session ID S7723)</h6>\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\nSchedule a Meeting with Us\r\n\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 16:47:15','2017-05-05 20:47:15','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0);
INSERT INTO `wp_posts` VALUES (9606,6,'2017-05-05 16:47:37','2017-05-05 20:47:37','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17.jpg\"><img class=\"alignnone size-medium wp-image-9598\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17-300x168.jpg\" alt=\"GTC17\" width=\"300\" height=\"168\" /></a>\r\n\r\nGTC is quickly approaching and we want to see you there!\r\n\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n<h4><strong>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</strong></h4>\r\n<h6>Presented by Kumar Aatish - Thursday May 11 9:00 am - Marriott Ballroom 3 (Session ID S7723)</h6>\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\nSchedule a Meeting with Us\r\n\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 16:47:37','2017-05-05 20:47:37','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0),(9607,6,'2017-05-05 16:48:15','2017-05-05 20:48:15','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17.jpg\"><img class=\"alignnone size-medium wp-image-9598\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17-300x168.jpg\" alt=\"GTC17\" width=\"300\" height=\"168\" /></a>\r\n\r\nGTC is quickly approaching and we want to see you there!\r\n\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n<h5><strong>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</strong></h5>\r\n<h6>Presented by Kumar Aatish - Thursday May 11 9:00 am - Marriott Ballroom 3 (Session ID S7723)</h6>\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\nSchedule a Meeting with Us\r\n\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 16:48:15','2017-05-05 20:48:15','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0),(9608,6,'2017-05-05 16:52:41','2017-05-05 20:52:41','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17.jpg\"><img class=\"alignnone size-medium wp-image-9598\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/GTC17-300x168.jpg\" alt=\"GTC17\" width=\"300\" height=\"168\" /></a>\r\n\r\nGTC is quickly approaching and we want to see you there!\r\n<h6><strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong></h6>\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n<h5><strong>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</strong></h5>\r\n<h6>Presented by Kumar Aatish - Thursday May 11 9:00 am - Marriott Ballroom 3 (Session ID S7723)</h6>\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\nSchedule a Meeting with Us\r\n\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 16:52:41','2017-05-05 20:52:41','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0),(9609,6,'2017-05-05 17:06:23','2017-05-05 21:06:23','','NvidiaGPU','','inherit','open','closed','','nvidiagpu','','','2017-05-05 17:06:23','2017-05-05 21:06:23','',9596,'https://sandbox.arrayfire.com/wp-content/uploads/2017/05/NvidiaGPU.jpg',0,'attachment','image/jpeg',0),(9610,6,'2017-05-05 17:24:34','2017-05-05 21:24:34','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/NvidiaGPU.jpg\"><img class=\"alignnone size-full wp-image-9609\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/NvidiaGPU.jpg\" alt=\"NvidiaGPU\" width=\"722\" height=\"406\" /></a>\r\n<h5>GTC is quickly approaching and we want to see you there!</h5>\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n<h5><strong>Attend an ArrayFire Talk</strong></h5>\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n\r\n<strong>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</strong>\r\n\r\n<strong>Presented by Kumar Aatish - Thursday May 11 9:00 am - Marriott Ballroom 3\r\n(Session ID S7723)</strong>\r\n\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/10/IMG_0737-300x225.jpg\" alt=\"IMG_0737\" />\r\n<h5>Schedule a Meeting With Us</h5>\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 17:24:34','2017-05-05 21:24:34','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0),(9611,6,'2017-05-05 17:26:01','2017-05-05 21:26:01','<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/NvidiaGPU.jpg\"><img class=\"alignnone size-full wp-image-9609\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/NvidiaGPU.jpg\" alt=\"NvidiaGPU\" width=\"722\" height=\"406\" /></a>\r\n<h5>GTC is quickly approaching and we want to see you there!</h5>\r\n<strong>When: May 8-11</strong>\r\n<strong>Where: San Jose, California</strong>\r\n<strong>ArrayFire Booth: 406</strong>\r\n\r\nGTC is the world\'s premier GPU developer conference. Connect with experts from NVIDIA and other leaders in high performance computing. At GTC you\'ll discover what\'s next in GPU breakthroughs and gain useful insights in hundreds of sessions and hands-on labs covering a diverse range of application domains.\r\n<h5><strong>Attend an ArrayFire Talk</strong></h5>\r\nWe invite you to attend the following talk presented by one of our knowledgeable and experienced GPU developers.\r\n\r\n<strong>ARRAYFIRE GRAPH: DYNAMIC GRAPH LIBRARY FOR GPUS</strong>\r\n\r\n<strong>Presented by Kumar Aatish - Thursday May 11 at 9:00 am - Marriott Ballroom 3\r\n(Session ID S7723)</strong>\r\n\r\nArrayFire Graph is an out-of-core dynamic graph library that runs on NVIDIA GPUs. It enables users to create and update graphs at a very high rate. AF Graph has a number of high-performance graph analytic algorithms that can be run on the dynamic data. Dynamic graphs allow users to provide incremental edge updates instead of rebuilding the whole graph. AF Graph\'s out-of-core support can handle graphs that cannot fit in GPU memory and can handle billions of edges. Come to the talk and learn more!\r\n\r\nVisit the <a href=\"https://gputechconf2017.smarteventscloud.com/connect/search.ww#loadSearch-searchPhrase=&amp;searchType=session&amp;tc=0&amp;sortBy=abbreviationSort&amp;p=\">GTC Session Catalog</a> for more details—you don\'t want to miss out!\r\n\r\n<img src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/10/IMG_0737-300x225.jpg\" alt=\"IMG_0737\" />\r\n<h5>Schedule a Meeting With Us</h5>\r\nDo you want to meet with us personally? We\'d love to chat! Schedule a time to sit down with ArrayFire engineers and account representatives using our <a href=\"http://www.meetme.so/arrayfire\">online scheduler</a>.\r\n\r\nWe look forward to seeing everyone at GTC!','Visit ArrayFire at GTC 2017','','inherit','closed','closed','','9596-revision-v1','','','2017-05-05 17:26:01','2017-05-05 21:26:01','',9596,'https://sandbox.arrayfire.com/9596-revision-v1/',0,'revision','',0),(9612,6,'2017-05-05 17:35:10','2017-05-05 21:35:10','<span style=\"font-weight: 400;\">Today we are pleased to announce the release of ArrayFire v3.5, our open source library of parallel computing functions supporting CUDA, OpenCL, and CPU devices. This new version of ArrayFire improves features and performance for applications in machine learning, computer vision, signal processing, statistics, finance, and more.</span>\r\n\r\nThis release focuses on thread-safety, support for simple sparse-dense arithmetic operations, canny edge detector function, and a genetic algorithm example. A complete list of ArrayFire v3.5 updates and new features can be found in the product <a href=\"http://arrayfire.org/docs/releasenotes.htm\">Release Notes</a>.\r\n\r\n[custom_headline type=\"left\" level=\"h3\" looks_like=\"h3\"]Major Updates and Features[/custom_headline]\r\n<ul>\r\n 	<li>Sparse Matrix and BLAS (<a href=\"http://sandbox.arrayfire.com/sparse-matrices-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Support for CSR and COO storage types</li>\r\n 	<li>Sparse-Dense Matrix Multiplication and Matrix-Vector Multiplication</li>\r\n 	<li>Conversion to and from dense matrix to CSR and COO storage types</li>\r\n</ul>\r\n</li>\r\n 	<li>Support for Random Number Generator Engines (<a href=\"http://sandbox.arrayfire.com/random-number-generators-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Philox</li>\r\n 	<li>Threefry</li>\r\n 	<li>Mersenne Twister</li>\r\n</ul>\r\n</li>\r\n 	<li>Image Processing (<a href=\"http://sandbox.arrayfire.com/image-processing-functions-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>New interpolation functions</li>\r\n 	<li>Image moments</li>\r\n</ul>\r\n</li>\r\n 	<li>Faster JIT for CUDA and OpenCL (<a href=\"http://sandbox.arrayfire.com/performance-improvements-to-jit-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Performance improvements</li>\r\n 	<li>Support for evaluating multiple outputs in a single kernel</li>\r\n</ul>\r\n</li>\r\n 	<li>Improvements to Graphics (<a href=\"http://sandbox.arrayfire.com/graphics-updates-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Using Forge v0.9.0</li>\r\n 	<li>Vector Field plotting functionality</li>\r\n 	<li>Multiple overlays on the same window are now possible</li>\r\n 	<li>New API to set axes limits for graphs</li>\r\n 	<li>New API for plot and scatter</li>\r\n</ul>\r\n</li>\r\n</ul>\r\nFor the comprehensive list of new features and updates, please refer to our <a href=\"http://arrayfire.org/docs/releasenotes.htm\">release notes</a>.\r\n\r\n<span style=\"font-weight: 400;\">While we are happy for reaching this milestone, we are not complacent. Work on the next milestone has already commenced, and we hope to exceed the expectations of our community.</span>\r\n\r\n[custom_headline type=\"left\" level=\"h3\" looks_like=\"h3\"]Download[/custom_headline]\r\n\r\nArrayFire v3.5 can be downloaded from these locations:\r\n<ul>\r\n 	<li><a href=\"http://sandbox.arrayfire.com/download/\">Binaries</a></li>\r\n 	<li><a href=\"https://github.com/arrayfire\">Source code</a></li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h3\" looks_like=\"h3\"]Community[/custom_headline]\r\n\r\nArrayFire is continually improving through the addition of new functions and features. We welcome your feedback:\r\n<ul>\r\n 	<li>General discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\">ArrayFire Google Group</a></li>\r\n 	<li>Live discussion chat on the <a href=\"https://gitter.im/arrayfire/arrayfire?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\">ArrayFire Gitter</a></li>\r\n 	<li>Issue reports on the <a href=\"https://github.com/arrayfire/arrayfire/issues\">ArrayFire GitHub</a></li>\r\n</ul>\r\nFinally, as you find success with ArrayFire, we invite you to contribute a post to this blog to share with the broader community. Email <a href=\"mailto:scott@arrayfire.com\">sales@arrayfire.com</a> to contribute to this blog.\r\n\r\n&nbsp;','ArrayFire v3.4 Official Release','','inherit','closed','closed','','9597-revision-v1','','','2017-05-05 17:35:10','2017-05-05 21:35:10','',9597,'https://sandbox.arrayfire.com/9597-revision-v1/',0,'revision','',0),(9613,6,'2017-05-05 17:35:30','2017-05-05 21:35:30','<span style=\"font-weight: 400;\">Today we are pleased to announce the release of ArrayFire v3.5, our open source library of parallel computing functions supporting CUDA, OpenCL, and CPU devices. This new version of ArrayFire improves features and performance for applications in machine learning, computer vision, signal processing, statistics, finance, and more.</span>\r\n\r\nThis release focuses on thread-safety, support for simple sparse-dense arithmetic operations, canny edge detector function, and a genetic algorithm example. A complete list of ArrayFire v3.5 updates and new features can be found in the product <a href=\"http://arrayfire.org/docs/releasenotes.htm\">Release Notes</a>.\r\n\r\n[custom_headline type=\"left\" level=\"h3\" looks_like=\"h3\"]Major Updates and Features[/custom_headline]\r\n<ul>\r\n 	<li>Sparse Matrix and BLAS (<a href=\"http://sandbox.arrayfire.com/sparse-matrices-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Support for CSR and COO storage types</li>\r\n 	<li>Sparse-Dense Matrix Multiplication and Matrix-Vector Multiplication</li>\r\n 	<li>Conversion to and from dense matrix to CSR and COO storage types</li>\r\n</ul>\r\n</li>\r\n 	<li>Support for Random Number Generator Engines (<a href=\"http://sandbox.arrayfire.com/random-number-generators-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Philox</li>\r\n 	<li>Threefry</li>\r\n 	<li>Mersenne Twister</li>\r\n</ul>\r\n</li>\r\n 	<li>Image Processing (<a href=\"http://sandbox.arrayfire.com/image-processing-functions-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>New interpolation functions</li>\r\n 	<li>Image moments</li>\r\n</ul>\r\n</li>\r\n 	<li>Faster JIT for CUDA and OpenCL (<a href=\"http://sandbox.arrayfire.com/performance-improvements-to-jit-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Performance improvements</li>\r\n 	<li>Support for evaluating multiple outputs in a single kernel</li>\r\n</ul>\r\n</li>\r\n 	<li>Improvements to Graphics (<a href=\"http://sandbox.arrayfire.com/graphics-updates-in-arrayfire-v3-4/\">see blog post</a>)\r\n<ul>\r\n 	<li>Using Forge v0.9.0</li>\r\n 	<li>Vector Field plotting functionality</li>\r\n 	<li>Multiple overlays on the same window are now possible</li>\r\n 	<li>New API to set axes limits for graphs</li>\r\n 	<li>New API for plot and scatter</li>\r\n</ul>\r\n</li>\r\n</ul>\r\nFor the comprehensive list of new features and updates, please refer to our <a href=\"http://arrayfire.org/docs/releasenotes.htm\">release notes</a>.\r\n\r\n<span style=\"font-weight: 400;\">While we are happy for reaching this milestone, we are not complacent. Work on the next milestone has already commenced, and we hope to exceed the expectations of our community.</span>\r\n\r\n[custom_headline type=\"left\" level=\"h3\" looks_like=\"h3\"]Download[/custom_headline]\r\n\r\nArrayFire v3.5 can be downloaded from these locations:\r\n<ul>\r\n 	<li><a href=\"http://sandbox.arrayfire.com/download/\">Binaries</a></li>\r\n 	<li><a href=\"https://github.com/arrayfire\">Source code</a></li>\r\n</ul>\r\n[custom_headline type=\"left\" level=\"h3\" looks_like=\"h3\"]Community[/custom_headline]\r\n\r\nArrayFire is continually improving through the addition of new functions and features. We welcome your feedback:\r\n<ul>\r\n 	<li>General discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\">ArrayFire Google Group</a></li>\r\n 	<li>Live discussion chat on the <a href=\"https://gitter.im/arrayfire/arrayfire?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\">ArrayFire Gitter</a></li>\r\n 	<li>Issue reports on the <a href=\"https://github.com/arrayfire/arrayfire/issues\">ArrayFire GitHub</a></li>\r\n</ul>\r\nFinally, as you find success with ArrayFire, we invite you to contribute a post to this blog to share with the broader community. Email <a href=\"mailto:scott@arrayfire.com\">sales@arrayfire.com</a> to contribute to this blog.\r\n\r\n&nbsp;','ArrayFire v3.5 Official Release','','inherit','closed','closed','','9597-revision-v1','','','2017-05-05 17:35:30','2017-05-05 21:35:30','',9597,'https://sandbox.arrayfire.com/9597-revision-v1/',0,'revision','',0),(9615,17729,'2017-07-13 12:43:54','0000-00-00 00:00:00','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL as computational backbone.\r\n\r\nIn Forge v1.0, two kinds of renderings are possible. One is an Image and the other is a Chart. Chart by itself doesn\'t render anything other than axes and some labels on it. Chart has to be embedded with one or more of the following graphs to render the respective renderings.\r\n<ul>\r\n<li> 2D Line Plots </li>\r\n<li> 3D Line Plots </li>\r\n<li> Surfaces </li>\r\n<li> Histograms </li>\r\n<li> Vector fields, both 2D and 3D</li>\r\n<li> Images </li>\r\n</ul>\r\nFirst, we shall go through the details of how to create a window using Forge and later illustrate the rest of the functionality from v1.0 using some sample code snippets and images.\r\n<h5>How to Create a Window</h5>\r\nThe code used to create a window is identical in all the examples that illustrate inter-operation of CPU/CUDA/OpenCL with OpenGL. Therefore, the following window creation code is not repeated in later code snippets where only the draw calls and data-update steps will be shown.\r\n\r\n<pre><code>#include <forge.h>\r\n\r\nint main(void)\r\n{\r\n    /*\r\n     * First Forge call should be a window creation call\r\n     * so that necessary backend context is created\r\n     */\r\n    forge::Window wnd(512, 512, \"Forge Demo\");\r\n\r\n    /* GPU buffers creation and population may happen here */\r\n    \r\n    do {// Render loop\r\n        // draw calls go here\r\n        // May update the data inside loop to creation animations\r\n    } while(!wnd.close());\r\n\r\n    return 0;\r\n}</code></pre>\r\n\r\n<h5>Rendering an Image to Window</h5>\r\nImage rendering example will be demonstrated using GL-CPU interop. Once the window creation is completed, we have to create an object of class <em>forge::Image</em>. \r\n<pre><code>forge::Image img(width, height, FG_RGBA, forge::u8);</code></pre>\r\n\r\nNow, create a variable of type <em>GfxHandle</em> that points to the OpenGL buffer and transfer the\r\ndata from CPU memory to OpenGL memory. The functions <em>createGLBuffer</em>, <em>copyToGLBuffer</em> are defined in ComputeCopy.h header.\r\n<pre><code>#define USE_FORGE_CPU_COPY_HELPERS\r\n#include <ComputeCopy.h> //User may implement their own data update code\r\n\r\nkernel(bmp);                    // create the fractal\r\n\r\nGfxHandle* handle = 0;          // GL-CPU interop buffer handle\r\n    \r\ncreateGLBuffer(&handle, img.pixels(), FORGE_IMAGE_BUFFER);\r\n\r\n// copy the data from compute buffer to graphics buffer\r\ncopyToGLBuffer(handle, (ComputeResourceHandle)bmp.ptr, img.size());</code></pre>\r\n\r\nIt\'s time to render the image to window. If at all, the image needs to be updated during the render loop, you can do so by calling <em>copyToGLBuffer</em> with updated data pointer inside the render loop.\r\n<pre><code>do {\r\n    wnd.draw(img); // Draw call to render an image to window\r\n} while(!wnd.close());</code></pre>\r\n\r\nClean up the resources.\r\n<pre><code>releaseGLBuffer(handle); // In ComputeCopy.h\r\ndestroyBitmap(bmp); // Clear CPU memory buffer</code></pre>\r\n\r\nYou can look up the entire example\'s source code <a href=\"https://github.com/arrayfire/forge/blob/devel/examples/cpu/fractal.cpp\">here</a>. The output of fractal render is shown below.\r\n[caption id=\"attachment_9630\" align=\"aligncenter\" width=\"728\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\" alt=\"Fractal Demo\" width=\"728\" height=\"772\" class=\"size-full wp-image-9630\" /></a> Fractal Demo[/caption]\r\n\r\n<h5>Rendering a Histogram</h5>\r\nWe will use CUDA-GL interop for this example. Let\'s create an object of class <em>forge::Histogram</em> and add it to a <em>forge::Chart</em> object.\r\n<pre><code>forge::Image img(IMGW, IMGH, FG_RGBA, forge::u8); //Image placeholder\r\n\r\nforge::Chart chart(FG_CHART_2D); // Histogram is a 2D graph, hence a 2D chart\r\n\r\n//Axes Labels Format uses printf style formatting\r\nchart.setAxesLabelFormat(\"%3.1f\", \"%.2e\");\r\n\r\n/* set x axis limits to maximum and minimum values of data\r\n * and y axis limits to range [0, number of pixels ideally]\r\n * but practically total number of pixels as y range will skew\r\n * the histogram graph vertically. Therefore setting it to\r\n * 25% of total number of pixels */\r\nchart.setAxesLimits(0, 1, 0, IMGW*IMGH/(float)(NBINS/4.0));\r\n\r\n// Create histogram object specifying number of bins\r\n// this call automatically appends the histogram to list\r\n// of objects to be rendered by chart after it is created.\r\nforge::Histogram hist = chart.histogram(NBINS, forge::s32);\r\n\r\n// Set global bar color which is used if no per-bar colors are used\r\nhist.setColor(FG_YELLOW);</code></pre>\r\n\r\nNow, create GL buffer handles for image, histogram data points and colors of histogram bars.\r\n<pre><code>#define USE_FORGE_CUDA_COPY_HELPERS\r\n#include <ComputeCopy.h>\r\n\r\nGfxHandle* handles[3];\r\n\r\ncreateGLBuffer(&handles[0], img.pixels(), FORGE_IMAGE_BUFFER);\r\ncreateGLBuffer(&handles[1], hist.vertices(), FORGE_VERTEX_BUFFER);\r\ncreateGLBuffer(&handles[2], hist.colors(), FORGE_VERTEX_BUFFER);\r\n\r\n//Helper fn used to create histogram from image\r\nkernel(bmp, noiseGenerator);\r\n\r\n//Copy image to img resource handle\r\ncopyToGLBuffer(handles[0], (ComputeResourceHandle)bmp.ptr, img.size());\r\n\r\n// create the histogram from image and generate\r\n// histogram bar colors\r\npopulateBins(bmp, histOut, NBINS, histColors);\r\n\r\n//Copy histogram frequencies and bar colors to OpenGL buffers\r\ncopyToGLBuffer(handles[1], (ComputeResourceHandle)histOut, hist.verticesSize());\r\ncopyToGLBuffer(handles[2], (ComputeResourceHandle)histColors, hist.colorsSize());</code></pre>\r\n\r\nIt\'s time to render the histogram and image to the window. Note that we added only histogram to the chart. So, the image has to be somehow rendered to the same window such that we can view both the image and histogram at the same time. Multiple view rendering comes to rescue here. Let\'s take a look at the code to see how it helps.\r\n<pre><code>do {\r\n     /*\r\n      * Split the window into grid regions\r\n      */\r\n     // Render the image to the sub-view with index 0 if the\r\n     // entire window is divided into 1 row and 2 columns\r\n     wnd.draw(1, 2, 0, img,  \"Dynamic Perlin Noise\" );\r\n     // Render the image to the sub-view with index 1 if the\r\n     // entire window is divided into 1 row and 2 columns\r\n     wnd.draw(1, 2, 1, chart, \"Histogram of Noisy Image\");\r\n     // Swap the render buffers to display new rendering\r\n     wnd.swapBuffers(); \r\n} while(!wnd.close());\r\n\r\n// cleanup resources\r\nFORGE_CUDA_CHECK(cudaFree(histOut));\r\nFORGE_CUDA_CHECK(cudaFree(histColors));\r\nreleaseGLBuffer(handles[0]);\r\nreleaseGLBuffer(handles[1]);\r\nreleaseGLBuffer(handles[2]);</code></pre>\r\n\r\nYou can look up the entire example\'s source code <a href=\"https://github.com/arrayfire/forge/blob/devel/examples/cuda/histogram.cu\">here</a>. The output of histogram render is shown below.\r\n[caption id=\"attachment_9629\" align=\"aligncenter\" width=\"1228\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\" alt=\"Histogram\" width=\"1228\" height=\"829\" class=\"size-full wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n<h5>Multiple View Rendering</h5>\r\nGiven below are some examples of non-regular grid layouts that are possible using Forge\'s multiple view rendering.\r\n<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/06/grids.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/06/grids.png\" alt=\"grids\" width=\"942\" height=\"419\" class=\"aligncenter size-full wp-image-9664\" /></a>\r\n\r\n<h5>Rendering Multiple Plots on a Chart</h5>\r\nWe will use OpenCL-GL interop for this example. When it comes to interop with OpenCL, please make sure OpenGL context is created first before setting up any of the OpenCL objects.\r\n<pre><code>// Do \"#define USE_FORGE_OPENCL_COPY_HELPERS\" before including ComputeCopy header.\r\n\r\nforge::Chart chart(FG_CHART_2D);\r\nchart.setAxesLimits(FRANGE_START, FRANGE_END, -1.0f, 1.0f);\r\n\r\n/* Create several plot objects which creates the necessary\r\n * vertex buffer objects to hold the different plot types\r\n */\r\n// Line plot with triangle markers at data points\r\nforge::Plot plt1 = chart.plot(DATA_SIZE, forge::f32, FG_PLOT_LINE, FG_MARKER_TRIANGLE);\r\n\r\n// Line plot with circular markers at data points\r\nforge::Plot plt2 = chart.plot(DATA_SIZE, forge::f32, FG_PLOT_LINE, FG_MARKER_CIRCLE);\r\n\r\n/* Set plot colors */\r\n//use a forge predefined color FG_GREEN & FG_RED\r\nplt1.setColor(FG_RED);\r\nplt2.setColor(FG_GREEN);\r\n\r\n/* Set plot legends */\r\nplt1.setLegend(\"Cosine\");\r\nplt2.setLegend(\"Tangent\");\r\n\r\n/* set plot global marker size */\r\nplt1.setMarkerSize(20);\r\n//plt2 will use default marker size\r\n\r\n/*\r\n * Helper function to create a CLGL interop context.\r\n * This function checks for if the extension is available\r\n * and creates the context on the appropriate device.\r\n *\r\n * Note: context and queue are defined in cl_helpers.h\r\n *       and these are returned by getContext() and getCommandQueue()\r\n *       functions when they are called by createGLBuffer, copyToGLBuffer\r\n *       and releaseGLBuffer copy helper functions\r\n */\r\ncontext = createCLGLContext(wnd);\r\nDevice device = context.getInfo<CL_CONTEXT_DEVICES>()[0];\r\nqueue = CommandQueue(context, device);\r\n\r\nGfxHandle* handles[5];\r\n\r\n// create GL-OpenCL interop buffers\r\ncreateGLBuffer(&handles[0], plt1.vertices(), FORGE_VERTEX_BUFFER);\r\ncreateGLBuffer(&handles[1], plt2.vertices(), FORGE_VERTEX_BUFFER);\r\ncreateGLBuffer(&handles[2], plt2.colors(), FORGE_VERTEX_BUFFER);\r\ncreateGLBuffer(&handles[3], plt2.alphas(), FORGE_VERTEX_BUFFER);\r\ncreateGLBuffer(&handles[4], plt2.radii(), FORGE_VERTEX_BUFFER);\r\n\r\ncl::Buffer cosOut(context, CL_MEM_READ_WRITE, sizeof(float) * DATA_SIZE * 2);\r\ncl::Buffer tanOut(context, CL_MEM_READ_WRITE, sizeof(float) * DATA_SIZE * 2);\r\ncl::Buffer colorsOut(context, CL_MEM_READ_WRITE, sizeof(float) * DATA_SIZE * 3);\r\ncl::Buffer alphasOut(context, CL_MEM_READ_WRITE, sizeof(float) * DATA_SIZE);\r\ncl::Buffer radiiOut(context, CL_MEM_READ_WRITE, sizeof(float) * DATA_SIZE);\r\ncl::Buffer dummy;\r\n\r\nkernel(cosOut, 0, 0, dummy, dummy, dummy, queue, device);\r\nkernel(tanOut, 1, 0x00000007, colorsOut, alphasOut, radiiOut, queue, device);\r\n\r\n/* copy your data into the opengl buffer object exposed by\r\n * forge::Plot class and then proceed to rendering.\r\n * To help the users with copying the data from compute\r\n * memory to display memory, Forge provides copy headers\r\n * along with the library to help with this task\r\n */\r\ncopyToGLBuffer(handles[0], (ComputeResourceHandle)cosOut(), plt1.verticesSize());\r\ncopyToGLBuffer(handles[1], (ComputeResourceHandle)tanOut(), plt2.verticesSize());\r\n\r\n/* update color value for tan graph */\r\ncopyToGLBuffer(handles[2], (ComputeResourceHandle)colorsOut(), plt2.colorsSize());\r\n\r\n/* update alpha values for tan graph */\r\ncopyToGLBuffer(handles[3], (ComputeResourceHandle)alphasOut(), plt2.alphasSize());\r\n\r\n/* update marker sizes for tan graph markers */\r\ncopyToGLBuffer(handles[4], (ComputeResourceHandle)radiiOut(), plt2.radiiSize());</code></pre>\r\n\r\nWe don\'t have multiple view rendering here and the draw call is simple and similar to how image example does it. You can look up the entire example\'s source code <a href=\"https://github.com/arrayfire/forge/blob/devel/examples/opencl/bubblechart.cpp\">here</a>. The output of multiple plot rendering is shown below.\r\n[caption id=\"attachment_9628\" align=\"aligncenter\" width=\"998\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\" alt=\"Multiple Plots Per Chart\" width=\"998\" height=\"844\" class=\"size-full wp-image-9628\" /></a> Multiple Plots Per Chart[/caption]\r\n\r\n<h5>Sample Renders of Surface & Vector Field</h5>\r\n[gallery columns=\"2\" size=\"medium\" ids=\"9634,9665\"]\r\nSource code for these examples can be found <a href=\"https://github.com/arrayfire/forge/tree/devel/examples\">here</a>.\r\n\r\n<h5>Font Management</h5>\r\nThe class <em>forge::Font</em> provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.\r\n<pre><code>/* create an font object and load necessary font\r\n     * and later pass it on to window object so that\r\n     * it can be used for rendering text\r\n     *\r\n     * NOTE: THIS IS OPTIONAL STEP, BY DEFAULT WINDOW WILL\r\n     * HAVE FONT ALREADY SETUP*/\r\n    forge::Font fnt;\r\n#ifdef OS_WIN\r\n    fnt.loadSystemFont(\"Calibri\");\r\n#else\r\n    fnt.loadSystemFont(\"Vera\");\r\n#endif\r\n    wnd.setFont(&fnt);</code></pre>\r\n\r\n<h5>Window Interactivity</h5>\r\nForge provides basic mouse interactivity such as pan, zoom and trackball rotation.\r\n\r\n<h5>Error Handling</h5>\r\n<em>forge::Error</em> is the exception class that you should use to catch the errors thrown by Forge.\r\n\r\n<h5>Documentation</h5>\r\nFull documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.\r\n\r\n<h5>Building from Source</h5>\r\nYou can find all the build dependencies required to build Forge from source <a href=\"https://github.com/arrayfire/forge/blob/devel/README.md\">here</a>. Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>.\r\n\r\n<h5>Community</h5>\r\nForge is continually improving through addition of new features. We welcome your feedback. Please feel free to leave your comments on any of the following channels.\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','draft','open','closed','','','','','2017-07-13 12:43:54','2017-07-13 16:43:54','',0,'https://sandbox.arrayfire.com/?p=9615',0,'post','',0),(9616,17729,'2017-05-18 03:55:22','2017-05-18 07:55:22','','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 03:55:22','2017-05-18 07:55:22','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9617,17729,'2017-05-18 04:04:41','2017-05-18 08:04:41','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualizations library for C/C++ applications that use CUDA/OpenCL.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 04:04:41','2017-05-18 08:04:41','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9619,17729,'2017-05-18 06:24:20','2017-05-18 10:24:20','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualizations library for C/C++ applications that use CUDA/OpenCL.\r\n\r\n\r\n<h4> Sample Images </h4>\r\n<table>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/blob/devel/docs/images/image.png\" width=150 height=100>Image</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/blob/devel/docs/images/plot.png\" width=150 height=100>2D Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/blob/devel/docs/images/plot31.png\" width=150 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/blob/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/blob/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/blob/devel/docs/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:24:20','2017-05-18 10:24:20','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9620,17729,'2017-05-18 06:25:40','2017-05-18 10:25:40','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualizations library for C/C++ applications that use CUDA/OpenCL.\r\n\r\n\r\n<h4> Sample Images </h4>\r\n<table>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/image.png\" width=150 height=100>Image</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot.png\" width=150 height=100>2D Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot31.png\" width=150 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:25:40','2017-05-18 10:25:40','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9621,17729,'2017-05-18 06:26:01','2017-05-18 10:26:01','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualizations library for C/C++ applications that use CUDA/OpenCL.\r\n\r\n\r\n<h4> Sample Images </h4>\r\n<table>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/image.png\" width=150 height=100>Image</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot.png\" width=150 height=100>2D Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot31.png\" width=150 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:26:01','2017-05-18 10:26:01','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9622,17729,'2017-05-18 06:26:50','2017-05-18 10:26:50','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualizations library for C/C++ applications that use CUDA/OpenCL.\r\n\r\n\r\n<h4> Sample Images </h4>\r\n<table border=\"0\">\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/image.png\" width=150 height=100>Image</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot.png\" width=150 height=100>2D Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot31.png\" width=150 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:26:50','2017-05-18 10:26:50','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9623,17729,'2017-05-18 06:28:42','2017-05-18 10:28:42','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualizations library for C/C++ applications that use CUDA/OpenCL. Complete list of Forge features can be found in the product <a href=\"https://github.com/arrayfire/forge/releases/tag/v1.0.0\" target=\"_blank\">release notes</a>.\r\n\r\n\r\n<h4> Sample Images </h4>\r\n<table border=\"0\">\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/image.png\" width=150 height=100>Image</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot.png\" width=150 height=100>2D Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot31.png\" width=150 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:28:42','2017-05-18 10:28:42','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9624,17729,'2017-05-18 06:33:37','2017-05-18 10:33:37','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualizations library for C/C++ applications that use CUDA/OpenCL. Complete list of Forge features can be found in the product <a href=\"https://github.com/arrayfire/forge/releases/tag/v1.0.0\" target=\"_blank\">release notes</a>.\r\n\r\n\r\n<h4> Sample Images </h4>\r\n<table border=\"0\">\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/image.png\" width=150 height=100>Image</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot.png\" width=150 height=100>2D Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot31.png\" width=150 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through the addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:33:37','2017-05-18 10:33:37','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9625,17729,'2017-05-18 06:33:55','2017-05-18 10:33:55','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualizations library for C/C++ applications that use CUDA/OpenCL. Complete list of Forge features can be found in the product <a href=\"https://github.com/arrayfire/forge/releases/tag/v1.0.0\" target=\"_blank\">release notes</a>.\r\n\r\n\r\n<h4> Sample Images </h4>\r\n<table border=\"0\">\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/image.png\" width=150 height=100>Image</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot.png\" width=150 height=100>2D Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot31.png\" width=150 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:33:55','2017-05-18 10:33:55','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9626,17729,'2017-05-18 06:36:02','2017-05-18 10:36:02','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualizations library for C/C++ applications that use CUDA/OpenCL. Complete list of Forge features can be found in the product <a href=\"https://github.com/arrayfire/forge/releases/tag/v1.0.0\" target=\"_blank\">release notes</a>.\r\n\r\n<h4>Features</h4>\r\n<ul>\r\n<li>Forge has both C++ and C API. We recommend the C++ API, written atop C API, as the C API intended to enable easy write of bindings for other languages.</li>\r\n\r\n<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n\r\n<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n\r\n\r\n<ul>\r\n<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n\r\n<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n\r\n\r\n<ul>\r\n<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n\r\n<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n\r\n\r\n<ul>\r\n<li><code>fg::Histogram</code> - bar graphs</li>\r\n\r\n<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n\r\n<li><code>fg::Surface</code> - 3D surface plots</li>\r\n\r\n<li><code>fg::VectorField</code> - 2D and 3D vector fields</li></ul>\r\n</li></ul>\r\n</li>\r\n\r\n<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n\r\n<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li></ul>\r\n</li>\r\n\r\n<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n\r\n<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4> Sample Images </h4>\r\n<table border=\"0\">\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/image.png\" width=150 height=100>Image</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot.png\" width=150 height=100>2D Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot31.png\" width=150 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:36:02','2017-05-18 10:36:02','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9627,17729,'2017-05-18 06:38:14','2017-05-18 10:38:14','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualizations library for C/C++ applications that use CUDA/OpenCL.\r\n\r\n<h4>Features</h4>\r\n<ul>\r\n<li>Forge has both C++ and C API. We recommend the C++ API, written atop C API, as the C API intended to enable easy write of bindings for other languages.</li>\r\n\r\n<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n\r\n<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n\r\n\r\n<ul>\r\n<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n\r\n<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n\r\n\r\n<ul>\r\n<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n\r\n<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n\r\n\r\n<ul>\r\n<li><code>fg::Histogram</code> - bar graphs</li>\r\n\r\n<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n\r\n<li><code>fg::Surface</code> - 3D surface plots</li>\r\n\r\n<li><code>fg::VectorField</code> - 2D and 3D vector fields</li></ul>\r\n</li></ul>\r\n</li>\r\n\r\n<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n\r\n<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li></ul>\r\n</li>\r\n\r\n<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n\r\n<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4> Sample Images </h4>\r\n<table border=\"0\">\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/image.png\" width=150 height=100>Image</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot.png\" width=150 height=100>2D Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot31.png\" width=150 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:38:14','2017-05-18 10:38:14','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9628,17729,'2017-05-18 06:41:49','2017-05-18 10:41:49','','fgv1_bubble','Multiple Plots Per Chart','inherit','open','closed','','fgv1_bubble','','','2017-06-22 07:51:28','2017-06-22 11:51:28','',9615,'https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png',0,'attachment','image/png',0),(9629,17729,'2017-05-18 06:41:51','2017-05-18 10:41:51','','fgv1_hist','Histogram','inherit','open','closed','','fgv1_hist','','','2017-05-18 06:48:19','2017-05-18 10:48:19','',9615,'https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png',0,'attachment','image/png',0),(9630,17729,'2017-05-18 06:41:54','2017-05-18 10:41:54','','fgv1_image','Fractal Demo','inherit','open','closed','','fgv1_image','','','2017-06-22 06:40:05','2017-06-22 10:40:05','',9615,'https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png',0,'attachment','image/png',0),(9631,17729,'2017-05-18 06:41:56','2017-05-18 10:41:56','','fgv1_plot','','inherit','open','closed','','fgv1_plot','','','2017-05-18 06:41:56','2017-05-18 10:41:56','',9615,'https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot.png',0,'attachment','image/png',0),(9632,17729,'2017-05-18 06:41:58','2017-05-18 10:41:58','','fgv1_plot31','3D Plot','inherit','open','closed','','fgv1_plot31','','','2017-05-18 06:49:57','2017-05-18 10:49:57','',9615,'https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png',0,'attachment','image/png',0),(9633,17729,'2017-05-18 06:42:01','2017-05-18 10:42:01','','fgv1_plot32','Rotated 3D Plot','inherit','open','closed','','fgv1_plot32','','','2017-05-18 06:50:14','2017-05-18 10:50:14','',9615,'https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png',0,'attachment','image/png',0),(9634,17729,'2017-05-18 06:42:04','2017-05-18 10:42:04','','fgv1_surface','Surface','inherit','open','closed','','fgv1_surface','','','2017-05-18 06:49:38','2017-05-18 10:49:38','',9615,'https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png',0,'attachment','image/png',0),(9635,17729,'2017-05-18 06:43:41','2017-05-18 10:43:41','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n\r\n<h4>Features</h4>\r\n<ul>\r\n<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n\r\n<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n\r\n<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n\r\n\r\n<ul>\r\n<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n\r\n<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n\r\n\r\n<ul>\r\n<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n\r\n<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n\r\n\r\n<ul>\r\n<li><code>fg::Histogram</code> - bar graphs</li>\r\n\r\n<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n\r\n<li><code>fg::Surface</code> - 3D surface plots</li>\r\n\r\n<li><code>fg::VectorField</code> - 2D and 3D vector fields</li></ul>\r\n</li></ul>\r\n</li>\r\n\r\n<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n\r\n<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li></ul>\r\n</li>\r\n\r\n<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n\r\n<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4> Sample Images </h4>\r\n<table border=\"0\">\r\n<tr>\r\n  <td> \r\n<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"fgv1_image\" width=\"283\" height=\"300\" class=\"alignnone size-medium wp-image-9630\" /></a>\r\n</td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/image.png\" width=150 height=100>Image</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot.png\" width=150 height=100>2D Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot31.png\" width=150 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:43:41','2017-05-18 10:43:41','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9636,17729,'2017-05-18 06:45:29','2017-05-18 10:45:29','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n\r\n<h4>Features</h4>\r\n<ul>\r\n<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n\r\n<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n\r\n<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n\r\n\r\n<ul>\r\n<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n\r\n<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n\r\n\r\n<ul>\r\n<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n\r\n<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n\r\n\r\n<ul>\r\n<li><code>fg::Histogram</code> - bar graphs</li>\r\n\r\n<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n\r\n<li><code>fg::Surface</code> - 3D surface plots</li>\r\n\r\n<li><code>fg::VectorField</code> - 2D and 3D vector fields</li></ul>\r\n</li></ul>\r\n</li>\r\n\r\n<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n\r\n<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li></ul>\r\n</li>\r\n\r\n<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n\r\n<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4> Sample Images </h4>\r\n<table border=\"0\">\r\n<tr>\r\n  <td> <a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"fgv1_image\" width=\"283\" height=\"300\" class=\"alignnone size-medium wp-image-9630\" /></a> </td>\r\n  <td> [caption id=\"attachment_9628\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-150x150.png\" alt=\"Plot\" width=\"150\" height=\"150\" class=\"size-thumbnail wp-image-9628\" /></a> Plot[/caption]50 height=100>3d Plot</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/plot32.png\" width=150 height=100>Rotated 3d Plot</img> </td>\r\n</tr>\r\n<tr>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/hist.png\" width=150 height=100>histogram</img> </td>\r\n  <td> <img src=\"https://github.com/arrayfire/forge/raw/devel/docs/images/surface.png\" width=150 height=100>Surface</img> </td>\r\n</tr>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:45:29','2017-05-18 10:45:29','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9637,17729,'2017-05-18 06:50:22','2017-05-18 10:50:22','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n\r\n<h4>Features</h4>\r\n<ul>\r\n<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n\r\n<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n\r\n<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n\r\n\r\n<ul>\r\n<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n\r\n<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n\r\n\r\n<ul>\r\n<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n\r\n<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n\r\n\r\n<ul>\r\n<li><code>fg::Histogram</code> - bar graphs</li>\r\n\r\n<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n\r\n<li><code>fg::Surface</code> - 3D surface plots</li>\r\n\r\n<li><code>fg::VectorField</code> - 2D and 3D vector fields</li></ul>\r\n</li></ul>\r\n</li>\r\n\r\n<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n\r\n<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li></ul>\r\n</li>\r\n\r\n<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n\r\n<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4> Sample Images </h4>\r\n<table border=\"0\">\r\n<tr>\r\n\r\n  <td> [caption id=\"attachment_9630\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-150x150.png\" alt=\"Image\" width=\"150\" height=\"150\" class=\"size-thumbnail wp-image-9630\" /></a> Image[/caption] </td>\r\n\r\n  <td> [caption id=\"attachment_9629\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-150x150.png\" alt=\"Histogram\" width=\"150\" height=\"150\" class=\"size-thumbnail wp-image-9629\" /></a> Histogram[/caption] </td>\r\n\r\n</tr>\r\n\r\n<tr>\r\n\r\n  <td> [caption id=\"attachment_9628\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-150x150.png\" alt=\"Plot\" width=\"150\" height=\"150\" class=\"size-thumbnail wp-image-9628\" /></a> Plot[/caption] </td>\r\n\r\n  <td> [caption id=\"attachment_9634\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-150x150.png\" alt=\"Surface\" width=\"150\" height=\"150\" class=\"size-thumbnail wp-image-9634\" /></a> Surface[/caption] </td>\r\n\r\n</tr>\r\n\r\n<tr>\r\n\r\n  <td> [caption id=\"attachment_9632\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-150x150.png\" alt=\"3D Plot\" width=\"150\" height=\"150\" class=\"size-thumbnail wp-image-9632\" /></a> 3D Plot[/caption] </td>\r\n\r\n  <td> [caption id=\"attachment_9633\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-150x150.png\" alt=\"Rotated 3D Plot\" width=\"150\" height=\"150\" class=\"size-thumbnail wp-image-9633\" /></a> Rotated 3D Plot[/caption] </td>\r\n\r\n</tr>\r\n\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:50:22','2017-05-18 10:50:22','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9638,17729,'2017-05-18 06:51:09','2017-05-18 10:51:09','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h4>Features</h4>\r\n<ul>\r\n 	<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n<ul>\r\n 	<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>fg::Histogram</code> - bar graphs</li>\r\n 	<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>fg::Surface</code> - 3D surface plots</li>\r\n 	<li><code>fg::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n<h4>Sample Images</h4>\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img class=\"size-thumbnail wp-image-9630\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-150x150.png\" alt=\"Image\" width=\"150\" height=\"150\" /></a> Image[/caption]</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img class=\"size-thumbnail wp-image-9629\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-150x150.png\" alt=\"Histogram\" width=\"150\" height=\"150\" /></a> Histogram[/caption]</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img class=\"size-thumbnail wp-image-9628\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-150x150.png\" alt=\"Plot\" width=\"150\" height=\"150\" /></a> Plot[/caption]</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img class=\"size-thumbnail wp-image-9634\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-150x150.png\" alt=\"Surface\" width=\"150\" height=\"150\" /></a> Surface[/caption]</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img class=\"size-thumbnail wp-image-9632\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-150x150.png\" alt=\"3D Plot\" width=\"150\" height=\"150\" /></a> 3D Plot[/caption]</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img class=\"size-thumbnail wp-image-9633\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-150x150.png\" alt=\"Rotated 3D Plot\" width=\"150\" height=\"150\" /></a> Rotated 3D Plot[/caption]</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:51:09','2017-05-18 10:51:09','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9639,17729,'2017-05-18 06:52:19','2017-05-18 10:52:19','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h4>Features</h4>\r\n<ul>\r\n 	<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n<ul>\r\n 	<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>fg::Histogram</code> - bar graphs</li>\r\n 	<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>fg::Surface</code> - 3D surface plots</li>\r\n 	<li><code>fg::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n<h4>Sample Images</h4>\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img class=\"size-medium wp-image-9630\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-150x150.png\" alt=\"Image\" width=\"150\" height=\"150\" /></a> Image[/caption]</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img class=\"size-thumbnail wp-image-9629\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-150x150.png\" alt=\"Histogram\" width=\"150\" height=\"150\" /></a> Histogram[/caption]</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img class=\"size-thumbnail wp-image-9628\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-150x150.png\" alt=\"Plot\" width=\"150\" height=\"150\" /></a> Plot[/caption]</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img class=\"size-thumbnail wp-image-9634\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-150x150.png\" alt=\"Surface\" width=\"150\" height=\"150\" /></a> Surface[/caption]</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img class=\"size-thumbnail wp-image-9632\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-150x150.png\" alt=\"3D Plot\" width=\"150\" height=\"150\" /></a> 3D Plot[/caption]</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img class=\"size-thumbnail wp-image-9633\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-150x150.png\" alt=\"Rotated 3D Plot\" width=\"150\" height=\"150\" /></a> Rotated 3D Plot[/caption]</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:52:19','2017-05-18 10:52:19','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9640,17729,'2017-05-18 06:58:10','2017-05-18 10:58:10','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h4>Features</h4>\r\n<ul>\r\n 	<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n<ul>\r\n 	<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>fg::Histogram</code> - bar graphs</li>\r\n 	<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>fg::Surface</code> - 3D surface plots</li>\r\n 	<li><code>fg::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n<h4>Sample Images</h4>\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img class=\"size-thumbnail wp-image-9630\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-150x150.png\" alt=\"Image\" width=\"150\" height=\"150\" /></a> Image[/caption]</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img class=\"size-thumbnail wp-image-9629\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-150x150.png\" alt=\"Histogram\" width=\"150\" height=\"150\" /></a> Histogram[/caption]</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img class=\"size-thumbnail wp-image-9628\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-150x150.png\" alt=\"Plot\" width=\"150\" height=\"150\" /></a> Plot[/caption]</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img class=\"size-thumbnail wp-image-9634\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-150x150.png\" alt=\"Surface\" width=\"150\" height=\"150\" /></a> Surface[/caption]</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img class=\"size-thumbnail wp-image-9632\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-150x150.png\" alt=\"3D Plot\" width=\"150\" height=\"150\" /></a> 3D Plot[/caption]</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"150\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img class=\"size-thumbnail wp-image-9633\" src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-150x150.png\" alt=\"Rotated 3D Plot\" width=\"150\" height=\"150\" /></a> Rotated 3D Plot[/caption]</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:58:10','2017-05-18 10:58:10','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9641,17729,'2017-05-18 06:59:42','2017-05-18 10:59:42','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h4>Features</h4>\r\n<ul>\r\n 	<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n<ul>\r\n 	<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>fg::Histogram</code> - bar graphs</li>\r\n 	<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>fg::Surface</code> - 3D surface plots</li>\r\n 	<li><code>fg::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 06:59:42','2017-05-18 10:59:42','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9642,17729,'2017-05-18 07:01:59','2017-05-18 11:01:59','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h4>Features</h4>\r\n<ul>\r\n 	<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n<ul>\r\n 	<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>fg::Histogram</code> - bar graphs</li>\r\n 	<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>fg::Surface</code> - 3D surface plots</li>\r\n 	<li><code>fg::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 07:01:59','2017-05-18 11:01:59','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9643,17729,'2017-05-18 07:04:53','2017-05-18 11:04:53','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h4>Features</h4>\r\n<ul>\r\n 	<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n<ul>\r\n 	<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>fg::Histogram</code> - bar graphs</li>\r\n 	<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>fg::Surface</code> - 3D surface plots</li>\r\n 	<li><code>fg::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 07:04:53','2017-05-18 11:04:53','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9644,17729,'2017-05-18 07:06:48','2017-05-18 11:06:48','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h4>Features</h4>\r\n<ul>\r\n 	<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>fg</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>fg::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>fg::Image</code> and <code>fg::Chart</code> are the two main rendering objects that drawn on <code>fg::Window</code>\r\n<ul>\r\n 	<li><code>fg::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>fg::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>fg::Histogram</code> - bar graphs</li>\r\n 	<li><code>fg::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>fg::Surface</code> - 3D surface plots</li>\r\n 	<li><code>fg::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>fg::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>fg::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 07:06:48','2017-05-18 11:06:48','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9648,17729,'2017-05-18 15:05:37','2017-05-18 19:05:37','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h4>Features</h4>\r\n<ul>\r\n 	<li>Forge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.</li>\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>forge</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>forge::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>forge::Image</code> and <code>forge::Chart</code> are the two main rendering objects that drawn on <code>forge::Window</code>\r\n<ul>\r\n 	<li><code>forge::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>forge::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>forge::Histogram</code> - bar graphs</li>\r\n 	<li><code>forge::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>forge::Surface</code> - 3D surface plots</li>\r\n 	<li><code>forge::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>forge::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>forge::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-05-18 15:05:37','2017-05-18 19:05:37','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9649,1,'2017-05-26 16:08:48','2017-05-26 20:08:48','','Order &ndash; May 26, 2017 @ 04:08 PM','','wc-completed','open','closed','order_59288b4f82aba','order-may-26-2017-0808-pm','','','2017-05-26 16:08:51','2017-05-26 20:08:51','',0,'https://sandbox.arrayfire.com/?post_type=shop_order&#038;p=9649',0,'shop_order','',3),(9651,6,'2017-06-07 16:24:14','2017-06-07 20:24:14','[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][custom_headline type=\"left\" level=\"h2\" ]Train your team[/custom_headline] Attendees will receive the latest industry knowledge and techniques for GPU computing in CUDA and OpenCL.\r\n\r\nArrayFire offers up to four days of specialized GPU training in CUDA and OpenCL programming. We provide customized on-site training courses where we can travel to your location and provide a CUDA or OpenCL training course tailored to meet your application-specific needs. We also offer individual trainings at our Atlanta office.\r\n\r\nWe recommend that attendees have a working knowledge of C/C++ in order to gain the most from the training courses.\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Contact us about a training[/button]\r\n\r\n[/column]\r\n\r\n[column type=\"one-half\" last=\"true\" fade=\"true\" fade_animation=\"in-from-right\" class=\"center-text\"][gap size=\"15%\"][image src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/02/Professor-AF_Exported-e1395436350363.png\" ][/column]\r\n\r\n[/content_band][content_band bg_color=\"#F2f2f2\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[column type=\"one-half\"][gap size=\"10%\"]<img class=\"aligncenter wp-image-4806\" src=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/01/gears1-e1395437543311.png\" alt=\"gears\" width=\"427\" height=\"400\" />\r\n\r\n[/column][column type=\"one-half\" last=\"true\"]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Included in the course[/custom_headline]\r\n\r\nYou provide the minds, and we\'ll take care of the rest. Each training comes with the following:\r\n\r\n[icon_list] [icon_list_item type=\"angle-double-right\"]Instruction by an excellent and interesting expert[/icon_list_item] [icon_list_item type=\"angle-double-right\"]Hands-on exercises[/icon_list_item][icon_list_item type=\"angle-double-right\"]Use of a laptop with CUDA and OpenCL capable GPUs and CPUs [/icon_list_item] [icon_list_item type=\"angle-double-right\"]Choice of Linux or Windows operating system[/icon_list_item][icon_list_item type=\"angle-double-right\"]Printed manual of lecture material[/icon_list_item][icon_list_item type=\"angle-double-right\"]Electronic copy of programming exercises[/icon_list_item][/icon_list]\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Go ahead, contact us about a training[/button]\r\n\r\n[/column][/content_band]\r\n\r\n[content_band bg_image=\"http://sandbox.arrayfire.com/wp-content/uploads/2014/11/Epipheo-background1.png\" parallax=\"true\" inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[blockquote cite=\"<span style=\"color: #ffffff;\">Brian Rapp</span>\" type=\"center\"]<span style=\"color: #ffffff;\">One can\'t ask for better individualized instruction than the environment I was fortunate enough to encounter.</span> <span style=\"color: #ffffff;\">The instructor was able to completely focus on my particular needs and concerns.</span>\r\n\r\n<span style=\"color: #ffffff;\">—Brian Rapp,  U.S. Army Research Lab</span>[/blockquote]\r\n\r\n[/content_band]\r\n\r\n[content_band inner_container=\"true\" no_margin=\"true\" border=\"none\" padding_top=\"10px\" padding_bottom=\"40px\" ]\r\n\r\n[custom_headline type=\"left\" level=\"h2\"]Training Syllabus[/custom_headline] [column type=\"one-half\"] [custom_headline type=\"left\" level=\"h5\"  accent=\"false\"]Day 1, Introduction[/custom_headline] Lectures:\r\nGPU Computing Overview\r\nThe Programming Model\r\nBasic Dataset Mapping Techniques\r\nLibraries, ArrayFire\r\nProfiling Tools\r\n\r\nPractice:\r\nA Simple Kernel\r\nEquivalent ArrayFire Example\r\nUsing Libraries\r\nMonte Carlo Pi Estimation\r\nTiming and ArrayFire\r\nDebugging Code\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 3, Multi-GPU[/custom_headline] Lectures (customizable):\r\nMulti-GPU Use Cases\r\nMulti-GPUs: Contexts\r\nExisting Libraries\r\nScaling Across Multiple GPUs\r\n\r\nPractice:\r\nOut of Core Problems: Matrix Multiply\r\nTask Level Parallelism: Optimization\r\nArrayFire Multi-GPU[/column]\r\n\r\n[column type=\"one-half\" last=\"true\"] [custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 2, Optimization[/custom_headline] Lectures:\r\nArchitecture: Grids, Blocks, and Threads\r\nMemory Model: Global, Shared, and Constant Memory\r\nAdvanced Mapping Techniques\r\nStreams: Asynchronos Launches and Concurrent Execution\r\nArrayFire: Lazy Evaluation and Code Vectorization\r\n\r\nPractice:\r\nMatrix Transpose\r\nOptimization Using Shared Memory\r\nMedian Filter\r\nOptimization Using Constant Memory\r\nStream Example\r\nArrayFire Example: Nearest Neighbor Algorithm\r\n\r\n[custom_headline type=\"left\" level=\"h5\" accent=\"false\"]Day 4, Algorithm Problems[/custom_headline]\r\n\r\nLectures and Practice (customizable):\r\nReductions\r\nScan Algorithms\r\nSort\r\nConvolution\r\nCustomer-Specific Problem\r\n\r\n[button type=\"flat\" shape=\"rounded\"  size=\"regular\" href=\"mailto:sales@arrayfire.com?Subject=Training%20Inquiry\"]Okay, <em>now </em>contact us about a training[/button][/column][/content_band]','Training','','inherit','closed','closed','','6640-revision-v1','','','2017-06-07 16:24:14','2017-06-07 20:24:14','',6640,'https://sandbox.arrayfire.com/6640-revision-v1/',0,'revision','',0),(9653,17729,'2017-06-22 05:29:17','2017-06-22 09:29:17','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h3>Features</h3>\r\nForge serves primarily via C and C++ API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.\r\n\r\n<ul> 	\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>forge</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>forge::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>forge::Image</code> and <code>forge::Chart</code> are the two main rendering objects that drawn on <code>forge::Window</code>\r\n<ul>\r\n 	<li><code>forge::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>forge::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>forge::Histogram</code> - bar graphs</li>\r\n 	<li><code>forge::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>forge::Surface</code> - 3D surface plots</li>\r\n 	<li><code>forge::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>forge::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>forge::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-06-22 05:29:17','2017-06-22 09:29:17','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9654,17729,'2017-06-22 05:32:05','2017-06-22 09:32:05','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h3>Features</h3>\r\nForge\'s functionality are primarily exposed via C API. We recommend the C++ API, written atop C API, as the C API is intended to enable easy write of bindings for other languages.\r\n\r\n<ul> 	\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>forge</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>forge::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>forge::Image</code> and <code>forge::Chart</code> are the two main rendering objects that drawn on <code>forge::Window</code>\r\n<ul>\r\n 	<li><code>forge::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>forge::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>forge::Histogram</code> - bar graphs</li>\r\n 	<li><code>forge::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>forge::Surface</code> - 3D surface plots</li>\r\n 	<li><code>forge::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>forge::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>forge::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-06-22 05:32:05','2017-06-22 09:32:05','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9655,17729,'2017-06-22 05:35:41','2017-06-22 09:35:41','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL.\r\n<h3>Features</h3>\r\nForge\'s functionality is primarily exposed via C API. We recommend using the C++ wrapper written atop C API. The C API is mainly intended to enable easy write of bindings for other languages. Given below are some sample code snippets and images for the functionality that is part of v1.0 release.\r\n\r\n<h4>Windows</h4>\r\n\r\n<ul> 	\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>forge</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>forge::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>forge::Image</code> and <code>forge::Chart</code> are the two main rendering objects that drawn on <code>forge::Window</code>\r\n<ul>\r\n 	<li><code>forge::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>forge::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>forge::Histogram</code> - bar graphs</li>\r\n 	<li><code>forge::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>forge::Surface</code> - 3D surface plots</li>\r\n 	<li><code>forge::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>forge::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>forge::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-06-22 05:35:41','2017-06-22 09:35:41','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9656,17729,'2017-06-22 05:36:26','2017-06-22 09:36:26','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL as computational backbone.\r\n<h3>Features</h3>\r\nForge\'s functionality is primarily exposed via C API. We recommend using the C++ wrapper written atop C API. The C API is mainly intended to enable easy write of bindings for other languages. Given below are some sample code snippets and images for the functionality that is part of v1.0 release.\r\n\r\n<h4>Windows</h4>\r\n\r\n<ul> 	\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>forge</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>forge::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>forge::Image</code> and <code>forge::Chart</code> are the two main rendering objects that drawn on <code>forge::Window</code>\r\n<ul>\r\n 	<li><code>forge::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>forge::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>forge::Histogram</code> - bar graphs</li>\r\n 	<li><code>forge::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>forge::Surface</code> - 3D surface plots</li>\r\n 	<li><code>forge::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>forge::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>forge::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-06-22 05:36:26','2017-06-22 09:36:26','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9657,17729,'2017-06-22 05:37:01','2017-06-22 09:37:01','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL as computational backbone.\r\n<h3>Features</h3>\r\nForge\'s functionality is primarily exposed via C API. We recommend using the C++ wrapper written atop C API. The C API is mainly intended to enable easy write of bindings for other languages. Given below are some sample code snippets and images for the functionality that is part of v1.0 release.\r\n\r\n<h4>How to Create a Window</h4>\r\n\r\n<ul> 	\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>forge</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>forge::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>forge::Image</code> and <code>forge::Chart</code> are the two main rendering objects that drawn on <code>forge::Window</code>\r\n<ul>\r\n 	<li><code>forge::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>forge::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>forge::Histogram</code> - bar graphs</li>\r\n 	<li><code>forge::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>forge::Surface</code> - 3D surface plots</li>\r\n 	<li><code>forge::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>forge::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>forge::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-06-22 05:37:01','2017-06-22 09:37:01','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9658,17729,'2017-06-22 05:39:09','2017-06-22 09:39:09','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL as computational backbone.\r\n<h3>Features</h3>\r\nForge\'s functionality is primarily exposed via C API. We recommend using the C++ wrapper written atop C API. The C API is mainly intended to enable easy write of bindings for other languages. First, we shall go through the details of how to create a window using Forge and later illustrate the rest of functionality from v1.0 using some sample code snippets and images.\r\n\r\n<h4>How to Create a Window</h4>\r\n\r\n<ul> 	\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>forge</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>forge::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>forge::Image</code> and <code>forge::Chart</code> are the two main rendering objects that drawn on <code>forge::Window</code>\r\n<ul>\r\n 	<li><code>forge::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>forge::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>forge::Histogram</code> - bar graphs</li>\r\n 	<li><code>forge::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>forge::Surface</code> - 3D surface plots</li>\r\n 	<li><code>forge::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>forge::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>forge::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-06-22 05:39:09','2017-06-22 09:39:09','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9659,17729,'2017-06-22 05:39:30','2017-06-22 09:39:30','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL as computational backbone.\r\n\r\nForge\'s functionality is primarily exposed via C API. We recommend using the C++ wrapper written atop C API. The C API is mainly intended to enable easy write of bindings for other languages. First, we shall go through the details of how to create a window using Forge and later illustrate the rest of functionality from v1.0 using some sample code snippets and images.\r\n\r\n<h4>How to Create a Window</h4>\r\n\r\n<ul> 	\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>forge</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>forge::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>forge::Image</code> and <code>forge::Chart</code> are the two main rendering objects that drawn on <code>forge::Window</code>\r\n<ul>\r\n 	<li><code>forge::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>forge::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>forge::Histogram</code> - bar graphs</li>\r\n 	<li><code>forge::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>forge::Surface</code> - 3D surface plots</li>\r\n 	<li><code>forge::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>forge::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>forge::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-06-22 05:39:30','2017-06-22 09:39:30','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9660,17729,'2017-06-22 05:49:01','2017-06-22 09:49:01','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL as computational backbone.\r\n\r\nForge\'s functionality is primarily exposed via C API. We recommend using the C++ wrapper written atop C API. The C API is mainly intended to enable easy write of bindings for other languages. First, we shall go through the details of how to create a window using Forge and later illustrate the rest of functionality from v1.0 using some sample code snippets and images.\r\n\r\n<h4>How to Create a Window</h4>\r\n<code>\r\n#include <forge.h>\r\n\r\n#define USE_FORGE_CPU_COPY_HELPERS\r\n/*\r\n * Below <ComputeCopy.h> header inclusion requires definition of atleast one\r\n * of the following so that appropriate copy helper functions are included\r\n * for helping the user copy data from their own respective GPU buffer\'s to\r\n * the OpenGL buffers\r\n *     - USE_FORGE_CPU_COPY_HELPERS\r\n *     - USE_FORGE_CUDA_COPY_HELPERS\r\n *     - USE_FORGE_OPENCL_COPY_HELPERS\r\n */\r\n#include <ComputeCopy.h>\r\n\r\n/*\r\n * The user may choose to implement their own data updation code and skip\r\n * using the one provided by <ComputeCopy.h>\r\n */\r\n\r\nconst unsigned W = 1000;\r\nconst unsigned H = 800;\r\n\r\nusing namespace std;\r\n\r\nint main(void)\r\n{\r\n    /*\r\n     * First Forge call should be a window creation call\r\n     * so that necessary OpenGL context is created for any\r\n     * other forge::* object to be created successfully\r\n     */\r\n    forge::Window wnd(W, H, \"Forge Demo\");\r\n    wnd.makeCurrent(); //Make the window\'s context current\r\n\r\n	/* All GPU buffers creation and population with data\r\n     *  happens here\r\n     */\r\n\r\n    // Render loop begins\r\n    do {\r\n        // All draw calls go here\r\n    } while(!wnd.close());\r\n\r\n    return 0;\r\n}\r\n</code>\r\n\r\n<ul> 	\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>forge</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>forge::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>forge::Image</code> and <code>forge::Chart</code> are the two main rendering objects that drawn on <code>forge::Window</code>\r\n<ul>\r\n 	<li><code>forge::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>forge::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>forge::Histogram</code> - bar graphs</li>\r\n 	<li><code>forge::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>forge::Surface</code> - 3D surface plots</li>\r\n 	<li><code>forge::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>forge::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>forge::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-06-22 05:49:01','2017-06-22 09:49:01','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),(9661,17729,'2017-06-22 05:49:31','2017-06-22 09:49:31','Today, we are pleased to announce the first stable release of Forge - a high performance OpenGL visualization library for C/C++ applications that use CUDA/OpenCL as computational backbone.\r\n\r\nForge\'s functionality is primarily exposed via C API. We recommend using the C++ wrapper written atop C API. The C API is mainly intended to enable easy write of bindings for other languages. First, we shall go through the details of how to create a window using Forge and later illustrate the rest of functionality from v1.0 using some sample code snippets and images.\r\n\r\n<h4>How to Create a Window</h4>\r\n<code>\r\n<code>#include <forge.h>\r\n\r\n#define USE_FORGE_CPU_COPY_HELPERS\r\n/*\r\n * Below <ComputeCopy.h> header inclusion requires definition of atleast one\r\n * of the following so that appropriate copy helper functions are included\r\n * for helping the user copy data from their own respective GPU buffer\'s to\r\n * the OpenGL buffers\r\n *     - USE_FORGE_CPU_COPY_HELPERS\r\n *     - USE_FORGE_CUDA_COPY_HELPERS\r\n *     - USE_FORGE_OPENCL_COPY_HELPERS\r\n */\r\n#include <ComputeCopy.h>\r\n\r\n/*\r\n * The user may choose to implement their own data updation code and skip\r\n * using the one provided by <ComputeCopy.h>\r\n */\r\n\r\nconst unsigned W = 1000;\r\nconst unsigned H = 800;\r\n\r\nusing namespace std;\r\n\r\nint main(void)\r\n{\r\n    /*\r\n     * First Forge call should be a window creation call\r\n     * so that necessary OpenGL context is created for any\r\n     * other forge::* object to be created successfully\r\n     */\r\n    forge::Window wnd(W, H, \"Forge Demo\");\r\n    wnd.makeCurrent(); //Make the window\'s context current\r\n\r\n	/* All GPU buffers creation and population with data\r\n     *  happens here\r\n     */\r\n\r\n    // Render loop begins\r\n    do {\r\n        // All draw calls go here\r\n    } while(!wnd.close());\r\n\r\n    return 0;\r\n}</code>\r\n</code>\r\n\r\n<ul> 	\r\n 	<li>Full documentation of the library can be found <a href=\"http://arrayfire.org/forge/index.htm\">here</a>.</li>\r\n 	<li>Forge exposes all it\'s objects and function via the namespace <code>forge</code>. It has the following main classes.\r\n<ul>\r\n 	<li><code>forge::Window</code> - objects of this class provide the rendering canvas over which other objects are rendered.</li>\r\n 	<li><code>forge::Image</code> and <code>forge::Chart</code> are the two main rendering objects that drawn on <code>forge::Window</code>\r\n<ul>\r\n 	<li><code>forge::Image</code> is a rendering of a simple image to Window.</li>\r\n 	<li><code>forge::Chart</code> is base object to which other plotting objects (listed below) are appended and rendered in the order of addition with alpha blending.\r\n<ul>\r\n 	<li><code>forge::Histogram</code> - bar graphs</li>\r\n 	<li><code>forge::Plot</code> - 2D and 3D plots</li>\r\n 	<li><code>forge::Surface</code> - 3D surface plots</li>\r\n 	<li><code>forge::VectorField</code> - 2D and 3D vector fields</li>\r\n</ul>\r\n</li>\r\n</ul>\r\n</li>\r\n 	<li><code>forge::Font</code> - provides the choice of selecting the font for your program\'s rendering. You may skip using this class and the library will defer to the default fonts.</li>\r\n 	<li><code>forge::Error</code> - This is the exception object that you should use to catch the errors thrown by Forge.</li>\r\n</ul>\r\n</li>\r\n<li> Forge provides basic mouse interactivity such as pan, zoom and trackball rotation. </li>\r\n<li> All chart objects can have legends specific to each type of plot added to charts. </li>\r\n<li> Default window toolkit used by Forge is <a href=\"http://www.glfw.org/\" target=\"_blank\">GLFW</a>. However, you can also build Forge with <a href=\"https://www.libsdl.org/\" target=\"_blank\">SDL2</a>. </li>\r\n 	<li>Forge being a rendering only library, provides only the logic for rendering. However, we do provide helper functions through <a href=\"https://github.com/arrayfire/forge/blob/devel/include/ComputeCopy.h\">ComputeCopy.h headers</a> for the user\'s convenience.</li>\r\n 	<li>You can find the list of examples <a href=\"http://arrayfire.org/forge/examples.htm\">here</a>. These examples use the above <code>ComputeCopy</code> header.</li>\r\n</ul>\r\n\r\n<h4>Sample Images</h4>\r\n\r\n<table border=\"0\">\r\n<tbody>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9630\" align=\"alignnone\" width=\"283\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_image-283x300.png\" alt=\"Image\" width=\"283\" height=\"300\" class=\"size-medium wp-image-9630\" /></a> Image[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9629\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_hist-300x203.png\" alt=\"Histogram\" width=\"300\" height=\"203\" class=\"size-medium wp-image-9629\" /></a> Histogram[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9628\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_bubble-300x254.png\" alt=\"2D Plot\" width=\"300\" height=\"254\" class=\"size-medium wp-image-9628\" /></a> 2D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9634\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_surface-300x238.png\" alt=\"Surface\" width=\"300\" height=\"238\" class=\"size-medium wp-image-9634\" /></a> Surface[/caption]\r\n\r\n</td>\r\n</tr>\r\n<tr>\r\n<td>\r\n\r\n[caption id=\"attachment_9632\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot31-300x251.png\" alt=\"3D Plot\" width=\"300\" height=\"251\" class=\"size-medium wp-image-9632\" /></a> 3D Plot[/caption]\r\n\r\n</td>\r\n<td>\r\n\r\n[caption id=\"attachment_9633\" align=\"alignnone\" width=\"300\"]<a href=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32.png\"><img src=\"https://sandbox.arrayfire.com/wp-content/uploads/2017/05/fgv1_plot32-300x253.png\" alt=\"Rotated 3D Plot\" width=\"300\" height=\"253\" class=\"size-medium wp-image-9633\" /></a> Rotated 3D Plot[/caption]\r\n\r\n</td>\r\n</tr>\r\n</tbody>\r\n</table>\r\n\r\n<h4>Community</h4>\r\nForge is continually improving through addition of new features. We welcome your feedback:\r\n\r\nGeneral discussion forums on the <a href=\"https://groups.google.com/forum/#!forum/arrayfire-users\" target=\"_blank\">ArrayFire Google Group</a>\r\nLive discussion chat on the <a href=\"https://gitter.im/arrayfire/forge?utm_source=badge&amp;utm_medium=badge&amp;utm_campaign=pr-badge&amp;utm_content=badge\" target=\"_blank\">Forge Gitter</a>\r\nIssue reports on the <a href=\"https://github.com/arrayfire/forge/issues\" target=\"_blank\">Forge GitHub</a>\r\nFinally, as you find success with Forge, we invite you to contribute a post to this blog to share with the broader community. Email sales@arrayfire.com to contribute to this blog.','Forge v1.0 Official Release','','inherit','closed','closed','','9615-revision-v1','','','2017-06-22 05:49:31','2017-06-22 09:49:31','',9615,'https://sandbox.arrayfire.com/9615-revision-v1/',0,'revision','',0),